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* Add hwp retry loop as workaround until we resolve timeout issueChristian Geddes2020-01-211-4/+20
| | | | | | | | | | | | | | | | | | We were seeing check_for_ready timeout intermittently in driver tests. In locally built driver we saw that if we retried the hwp a few times we eventually passed. Incrementing the timeout value in the HWP itself did not seem to make the problem go away. We will remove this retry loop when we figure out the root of the problem. Change-Id: If39965268349891fc9170a5a29193aaf6fb8d583 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89780 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Yun Pan <yun.pan@ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Remove workaround added to increment MCS timeout for gemini'sChristian Geddes2020-01-171-51/+1
| | | | | | | | | | | | | | | | We are no longer using or supporting gemini cards so we can remove this workaround. Change-Id: I76303832cff93f8a8b5adec1d204ccb5ca827bc2 RTC: 248023 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89267 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Yun Pan <yun.pan@ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Add obj tree to EXTRAINCDIR for istep10Dan Crowell2020-01-101-1/+2
| | | | | | | | | | | | Some generated files will be needed by some HWPs in this istep. Change-Id: Ia8cbb87a4a9dfc5ede40261854df7ce3f22d9d8a Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89403 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Switch DECONFIG over to DELAYED_DECONFIGDan Crowell2019-12-171-1/+1
| | | | | | | | | | | | | | | | | | There is a race condition with the HWSV code on the FSP related to how deconfigurations are happened. A full solution on the FSP side would be difficult so we're making a few targeted fixes on the Hostboot side instead. Change-Id: I57a6ec80df77464131020499e43181c1869d2514 CQ: SW481625 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87928 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
* Automatically include config.hDan Crowell2019-12-068-13/+5
| | | | | | | | | | | | | | | | | | Rather than having to remember to include config.h anywhere we reference a CONFIG variable (and usually forgetting), this adds it to the default compiler flags so that it gets included in every source file we build. Change-Id: I53622ab4d46c55d942e98cae6ec03049fd5b3d08 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87475 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
* Add Physical Presence Check and Window Open FeaturesMike Baiocchi2019-11-141-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | This commit does the following: - Adds an interface to detect if physical presence has been asserted -- This happens in istep 6 -- If the window is open to detect this, it is then closed here - Adds an interface to possibly open the window to look for physical presence -- This happens in istep 10 -- It first checks to see if the window should be opened -- If the window is opened then the system shuts down to wait for physical presence to be asserted on the next power on - Adds the necessary attributes to support and test this functionality RTC:211220 Change-Id: I05a26ebad581875a4b9f2a51eb1ca3062f36c5fb Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/84656 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Christopher J Engel <cjengel@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
* Apply MC_HANG timeout workaround to all processorsChristian Geddes2019-09-131-59/+45
| | | | | | | | | | | | | | | | When we initially added this workaround for whatever reason we specified the master proc only. It needs to be applied to all procesors in the system. Change-Id: I5840f2b0670f1790393a385f045ee656ad76bef8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83594 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Skip Alternate PNOR Validation on alt-master proc if lpc init failsBill Hoffa2019-08-191-7/+12
| | | | | | | | | | | | | | | | | | - It is expected that the alt pnor validation step will fail if lpc init fails so this step should be skipped. The errors from lpc init are committed so that is already handled. Change-Id: I07ab852abd986d743bad86040ea9b13479926501 CQ: SW465693 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78345 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
* Add workaround to ignore MC channel hangs for Swift bringupChristian Geddes2019-08-092-2/+70
| | | | | | | | | | | | | | | | | Using the gemini cards we have been detecting channel hangs which are actually just a result of the gemini cards being slow. To work around this for now we will disable the channel hang checks for the memory controller. Change-Id: Ic21dca4c207140fab8d91b5f1f1a20e6670494cc Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81471 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Enable sbe update for AxoneChristian Geddes2019-06-241-3/+0
| | | | | | | | | | | | | | | | | Previously we had an old SBE image and newer MVPD so the SBE update was failing. Now that we have an updated image for axone we can run sbe customization without failing to update the MVPD rings. Change-Id: I86d3c8f6c7f95bb6969a0d58a6082e329c5bd391 RTC: 210806 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78751 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Re-enable calling p9_npu_scominitMatt Derksen2019-05-131-4/+0
| | | | | | | | | | | | | | | Pull out SIMICS_BRINGUP as simics now supports. Change-Id: Ideafcafb6c48615c0c214c2fd723a9f32d85c158 RTC:201738 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77052 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Gemini vs Explorer Presence Detection via SPDMatthew Raybuck2019-05-011-3/+7
| | | | | | | | | | | | | | | | | | | | | | | Since the OCMB chip is held in reset until after presence detection the IDEC register cannot be read to differentiate between Gemini and Explorer chip types. To work around this issue, during the early part of IPL when presence detection is occurring the OCMB IDEC function will instead read the SPD and populate the necessary attributes with what is found there. That will be used to determine the difference between Gemini and Explorer until later when the OCMB IDEC register can be read from. At that point the IDEC read will be executed again and the data read from the OCMB IDEC register will be used to cross-check the data read from the SPD. Any discrepancies will be handled with predictive error logs. Change-Id: Ica664b06ff3488f48253d3ef02eff2d49c5d240d RTC: 208696 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76108 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Collect IDEC for Explorer chipMatthew Raybuck2019-04-301-1/+30
| | | | | | | | | | | | | | | | | | | The OCMB Explorer Chip doesn't read for IDEC but instead assumes hardcoded values. Since the Explorer chip is held in reset until iStep 10.4, this commit will prevent IDEC reads during discoverTargets and instead perform the read when exp_check_for_ready() is successful. Change-Id: I4ef5a01badb195acca0c2187ef76ea55f58eafe4 RTC:201996 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75881 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Setup CONFIG_AXONE env variable correctlyChristian Geddes2019-04-061-7/+3
| | | | | | | | | | | | | | | | | | | | In previous attempt to use CONFIG_AXONE env variable as a flag to decided whether or not to compile certain AXONE only features we forgot to add in the config variable to HBconfig. Worse is we were using the wrong env var in the make files as a flag. As a result, without this change we are not running any Axone HWPs in axone simics. Change-Id: I82dd7f86c5ad390a23eab2d2123d1d10ca9edea3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75568 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* HB Improvements: Fix compiler warnings on modern compilersLuis Fernandez2019-04-052-4/+6
| | | | | | | | | | | | | | | | Resolve warnings when compiling with gcc 4.8. Compiled with GCC 7.3, no more compile errors/warnings; build ends with caught exception from linker. This commit compiles with GCC 8.2, no more error/warnings; except for a linking warning. Change-Id: Ib5d7c2b5bd350edc76ee2c7de96896154cd44420 RTC: 202716 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72271 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Compile Explorer MSS libs in our istepsmss libChristian Geddes2019-04-032-4/+9
| | | | | | | | | | | | | | | | We added P9A awhile back but forgot to add in the explorer libs. Some of the MSS hwps are requiring these so we need to add them. When we pulled this in it caused the HBI image for the Nimbus and Cumulus standalone layouts to be too large. To get around this we will not compile any Axone/Explorer HWP code in non-axone system configurations. Change-Id: I041f5f160a6e530995bbb1b350a1b2362704fbc8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75224 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Initialize and test alt-master PNOR access in all bootsBill Hoffa2019-03-012-18/+56
| | | | | | | | | | | | | | | | | | - Update to istep 10 (call_host_slave_sbe_update) to validate the alternate master pnor chip in all boots (no-op for systems with only one pnor chip) - Updates to pnor callout logic to callout as a PNOR part for several of the error paths Change-Id: I9218f9a14496444288ea7985e1fb080c25f7f201 RTC: 200449 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71489 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update simics build and pull in Axone binary to pnor generationChristian Geddes2019-02-201-1/+4
| | | | | | | | | | | | | | | | | | | | | | Previously we were using some CUMULUS binaries as placeholders until Axone versions were available. We now use the Axone version of the SBE and HW ref images. Also for MEMD we will now just fill it in with zeroed out ECC (all FF's w/ 0 for ECC bit). No plans to use that MEMD now but setting it aside for DDIMM config overwrites. When we pulled in the new SBE image we hit issues with the VPD being used not having the correct sizes. MVPD for Axone is not complete yet so until that gets resolved we will disable sbe updates for Axone. RTC: 197497 Change-Id: I470f44d297179556d7c2eb7b210c91a2cd38f23c Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72090 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to exp_check_for_ready to istep 10.4Christian Geddes2019-02-152-13/+62
| | | | | | | | | | | | | | | | | | As per P9 Axone IPL flow doc, this HWP needs to be called on every functional OCMB targets. This is called after the p9a_ocmb_enable hwp is called in this istep. Change-Id: I5bab233545769f396ba35b6d61c0733a9afd9087 RTC: 195553 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71787 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Skip NPU scominit until ARTMISS register gets updatedChristian Geddes2019-02-111-1/+5
| | | | | | | | | | | | | | | | This ARTMISS register that gets updated during npu_scominit changed for axone. If we run this step we take errors so we will skip it in the Axone flow till we get some updates. Change-Id: I4f1607ab2147692eef864ce0bf3ee73c43ba8bb3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71547 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to p9a_ocmb_enable to istep 10.4Christian Geddes2019-02-112-5/+38
| | | | | | | | | | | | | | | | Per IPL Flow doc for P9 Axone, p9a_ocmb_enable needs to be called on all processors during istep 10.4 RTC: 195553 Change-Id: I50fa98959008cccfe0620c8bc6e62f33ee91c135 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71229 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Change to DELAYED_DECONFIG for HX_KEYWORD errorsMatt Derksen2019-01-241-2/+3
| | | | | | | | | | | | | | | | Need to allow hwsv to create a dummy deconfigure record or the system will get stuck in an infinite reconfig loop. Change-Id: I2eb6a30f75bf92a42f829ba58dd9ee833f88edf5 CQ:SW453631 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70659 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support version 2 of PEC_PCIE_HX_KEYWORD_DATAMatt Derksen2019-01-091-18/+12
| | | | | | | | | | | | | | | | | Some old hardware incorrectly filled in version 1 of the HX_KEYWORD. This new version was created so old hardware will not stop system IPL. New cards will be updated to this new version, so they will support PCIE bifurcation. Change-Id: Ie2b9dee66d1905a39d6f2b734e50b070f63e819d CQ:SW453106 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70156 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable HX keyword bifurcationMatt Derksen2019-01-051-1/+7
| | | | | | | | | | | | | | Invalid HX Keyword data, 01029090, seen throughout the lab systems. Need to disable using this keyword until we come up with a workaround this bad data. Change-Id: I0a3350e5e10380ac00d36bc057d6d0ad65ff4eeb Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70095 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable PCIe slot bifurcation using HX keywordRichard J. Knight2018-12-072-36/+343
| | | | | | | | | | | | | | | | | | | | | | | | -Update the PCIe config code to check the contents of the HX keyword attribute when determining the lane configuration. The HX keyword was defined to describe the lane configuration for a specific PCIe slot. It is generally stored in the VPD data of a PCIe card where it is read by the FSP. If the HX keyword data is populated, the FSP will then update the PEC_PCIE_HX_KEYWORD_DATA attribute for the PCIe slot the card is installed in. Once hostboot reads the HX keyword it will determine the correct lane configuration and adjust the IOP configuration attributes for the hardware procedure, p9_pcie_scominit, to consume. Change-Id: I10b1fcc84aacf3caf835e3cc9fffd1350cd30935 RTC:189286 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59113 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Only allow key transition in istep 10.2Nick Bofferding2018-11-151-1/+2
| | | | | | | | | | | | | In certain cases, if a key transition driver was booted and the nest frequency had to be updated, the key transition flow would erroneously activate in istep 7.3 (call_mss_freq). This change confines key transitioning to istep 10.2 Change-Id: I450703e21bf68644298f77fcdfca62eae5c667e4 CQ: SW451376 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68685 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add PCIe dynamic bifurcation function for barreleye G2Mengze Liao2018-11-013-56/+156
| | | | | | | | | | | | | | | | Adds support to query the BMC (via sensor) to determine the bifurcation settings of the PCI slots. Resolves #125 Change-Id: Ibb4333140c6209a4a04c5f1a8adf3bd278899a8b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/52992 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Host went to kernel panic after gard'ing PEC0/PHB0 (PCIFIR CS)Rick Ward2018-07-261-71/+65
| | | | | | | | | | | | | | | | | | The host kernel was crashing when it probed PEC0/PHB0. HDAT was populating incorrectly, not showing that PEC0/PHB0 was gard'd. The code which populates HDAT uses the attribute, ATTR_PROC_PCIE_PHB_ACTIVE, to indicate which PHBs are active. I updated hostboot code to consider gards when setting the attribute. Change-Id: Ic1c208af6ed67d7b520c7c16ef1836be1dd66170 CQ:SW412466 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63295 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Clear XBUS FIR bits after SMP enabledNick Bofferding2018-07-211-13/+47
| | | | | | | | | | | | | | | | | | | Previously, XBUS link training kept track of bad lanes before and after the link training procedure, so as to clear FIR bits for old problems. This violates secure boot restrictions, so this change relocates the FIR bit clearing to after the SMP has been built Change-Id: I8f180801d98d693beb04a890936bb07f9c977dfb CQ: SW437852 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62629 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63093
* Only switch sides and perform hreset if SEEPROM side versions matchChristian Geddes2018-07-191-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | In the event that the SBE fails hostboot will attempt to recover it. During runtime hostboot will attempt an HRESET if the SBE is in a failed state. When the SBE performs the HRESET it will save some important information that will persist through the reset. If one side is failing to recover the retry code will attempt to switch sides and do the hreset. If the SBE seeproms have different versions of the SBE code the data that was supposed to persist through the HRESET will be in incorrect places because the version mismatch. Because of this we cannot switch seeprom sides and perform a hreset if the seeproms have different level of the SBE code. CQ: SW438029 Change-Id: Ic7078a886088cc4d5355cc076e72d0fc36f85027 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61605 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Read HW Key Hash From SBE Seeprom via ChipOp when applicableMike Baiocchi2018-07-061-0/+4
| | | | | | | | | | | | | | | | This commit uses SBEIO ChipOps to read the HW Key Hash from the SBE Seeprom when reading from the Seeprom that booted the processor. This will help avoid I2C collisions when both Hostboot and the SBE try to access the same SBE Seeprom at the same time. Change-Id: I5693cc59aa2a7259f07363328bd8513c943f0a06 CQ:SW435288 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61958 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* In non-MNFG, only match SBE keys for the sides that bootJaymes Wilks2018-06-281-69/+196
| | | | | | | | | | | | | | | | | | | FSP was not IPL'ing from SBE side 1 when production key is corrupt in SEEPROM of SBE side 0 (due to the key mismatch check). This change gets around that by only matching SBE keys for the sides that booted in non-MNFG case. Change-Id: I1dfcb5c7f7e281125fdbcfc8b8f3a84747c90f59 CQ:SW420430 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60571 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Defer handling attentions on non-master proc until after SMP is upDan Crowell2018-05-301-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The current code enables PRD/Attention Handling on the slave processors as soon as we get the SBE started (clocks running). This is a problem because most of the FIR regs are blacklisted such that we cannot write them until after the SMP is up and we are using xscom. This restriction will lead to an infinite loop in PRD if we get a recoverable attention on the slave proc. The fix is to defer all of the attention handling on the slave procs until after the SMP is up. We will move the enabled from istep 8.5 host_attnlisten_proc to the end of istep 10.1 proc_build_smp. Note that this makes 8.5 a complete NOOP. Change-Id: I1b6542efe2cd14717d7fa55d01327121027c6862 CQ: SW429438 Backport: yes Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59268 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Save and restore OBUS related firmasksChristian Geddes2018-05-291-0/+3
| | | | | | | | | | | | | | | | | | During Hostboot IPL time it is impossible to see OBUS peers because they exists on different nodes and Hostboot is unaware of other nodes. Because of this we must mask off additional OBUS related firs during Hostboot IPL time. After we have reached runtime and have re-adjusted PEER targets we can restore the FIR values to what they were prior to the additional masking Hostboot does during IPL time. Change-Id: Ib9c158191c7f68f4bd7126799ba0a0aba40cee18 CQ: SW425530 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58916 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add option to masterProcChipTargetHandle() to return functional chipMike Baiocchi2018-05-181-23/+40
| | | | | | | | | | | | | | | | | | | | | This commit adds an option to the two masterProcChipTargetHandle() functions to only look for and return a functional master proc chip as necessary with the issue in Defect SW424528. The default behavior of these functions - where the functionality is not checked - remains the same. Once use of these functions has also been updated to use this new option. Change-Id: I37049d2cb9299a9404b57d85031a364bdb257c82 CQ:SW424528 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58920 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Implement Centaur SCOM cacheNick Bofferding2018-05-081-0/+15
| | | | | | | | | | | | | | | | | | | This change implements a Centaur SCOM cache for sensitive SCOM registers. The cache is initialized and enabled before the first Centaur SCOM, and disabled just prior to locking down the Centaur configuration. Once the Centaur has been locked down, the real register values are compared to the cache entries, and the Centaur is deconfigured (not garded) on any mismatch in assumptions. RTC: 187288 Change-Id: I7b13bfd7eb6b427aba115d6944958bf55e171008 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57532 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* wrap test: Use MNFG_FLAGS instead of compile time flagPrachi Gupta2018-05-074-29/+31
| | | | | | | | | | | | Change-Id: I347075dd2424ee8b96805456b3d7d9962f428b64 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58347 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Added support, in Istep 08, to facilitate the testing of SMP wrapRoland Veloz2018-05-075-317/+125
| | | | | | | | | | | | | | | | | | Adding support, in Istep 08 to make HWP calls for many various components. In the various istep 8 call_proc_* and istep 10 call_proc*, I was able to consolidate the HWP call into a single single function. The consolidated code for these calls exists in the file nest/nestHwpHelperFuncs. Also added a function to capture errors in file isteps/istepHelperFuncs. Change-Id: I64f73d64950a52d2923f1c3fe280c55dffd1d742 RTC:190096 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56518 Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Rediscover I2C Targets after Host I2C ResetMike Baiocchi2018-05-071-1/+203
| | | | | | | | | | | | | | | | | | | | | | | It's possible that some targets that use I2C to detect if they are present might not be present after a system re-IPLs and performs a FSI I2C Reset. Therefore, later in the IPL, after a Host I2C Reset sequence an attempt to rediscover any of these targets is made. If any new targets are found, the system will re-IPL. Currently only supporting looking for DIMMs now on OpenPower systems with securemode enabled. Change-Id: I010135231f2f74869529a3dbc3344413b6d19dc9 RTC:178973 Backport:release-op920 CQ:SW427365 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57744 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Basic Support For Redundant TPMIlya Smirnov2018-05-021-2/+22
| | | | | | | | | | | | | | | | | | | This change implements the detection and initialization of the backup TPM in istep 10.14. The backup TPM is presence-detected and initialized; the logs of the primary TPM are extended into the secondary TPM in istep 10.14. After the initialization of the secondary TPM, all events are extended into both TPMs. A test was created to test whether the backup TPM is initialized correctly. Change-Id: I305500c9f680115e684ab153fc882b8d5364b0d4 RTC: 134912 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57374 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove logic to deconfigure PHBs in higher position within a pecPrachi Gupta2018-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Current deconfig logic will deconfigure PHBs with a higher unit position under a given pec, if we were deconfiguring the PHB with a lower unit position. For example, PEC1 has PHB1 and PHB2. If we deconfigured PHB1, then we would by association deconfigure PHB2 as well. However, if we deconfigured PHB2, then we would not deconfigure PHB1. This commit removes the logic where if PHB2 is deconfigured, PHB1 is deconfigured as well. To summarize, the end result is to be able to deconfigure PHB1 or PHB2 with no effect on the other. HWPs will handle the hw limitations we have between PHBS. Change-Id: I95b31f4d051c15d896d18adf0a7f7c1b994f5928 CQ: SW417485 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56499 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Always Lock Down SBE SEEPROM After SBE UpdateIlya Smirnov2018-04-091-5/+4
| | | | | | | | | | | | | | | | | Always force the SUL to be on, regardless of the status of security on the system. This will lock down the SBE SEEPROM and prevent writes to it. Do the setting of SUL after istep 10.2 after SBE is updated. Change-Id: If18986d709a44c8848ff31486bc1154759359c4c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56822 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Removing old TODO for dropped requirementDan Crowell2018-03-081-4/+2
| | | | | | | | | | | | | We are going to live with the workaround we've had in place for several years now. Change-Id: I7966f517cac2d820dc086c163a7985112e2d0fa3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53465 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Introduce new shared library for image processing fucntionsRichard J. Knight2018-03-021-3/+11
| | | | | | | | | | | | | | | | -Moved xip functions from pm lib into libimageprocs.so -Updated DEPLIBS to include new libimageprocs.so for istep libs. Change-Id: I9e1c90643448146f6e8ef953106c0eea521e35f0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51754 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> CI-Ready: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove Istep 10.3 From IPL FlowIlya Smirnov2018-02-083-879/+732
| | | | | | | | | | | | | | | | | | | | | | | Istep 10.3 (host_set_voltages) has been moved to Istep 8.12 and needs to be no-oped. Executing host_set_voltages twice causes crashes due to secureboot thinking we are trying to skip an istep. Note that validateSecuritySettings that was performed in 10.3 has now been moved to 10.4 (with the required sub-routines). Change-Id: I81284157dedebb3f4ee357ce28b29b1dd6a3fe8a CQ:SW416209 CMVC-Coreq:1044932 Backport: release-fips910 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53443 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HB supports - Use ADU chipops to switch fabric configurationThi Tran2018-02-031-2/+11
| | | | | | | | | | | | | Change-Id: I090cdac654d9c6efbe30748713687c6e36ff914d RTC:177597 CQ:SW413432 Backport: release-fips910 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52878 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Open up Hostboot VMM untrusted RO window on non-master procsNick Bofferding2018-01-251-2/+32
| | | | | | | | | | | | | | | | | | After the SMP is built, open up untrusted, read-only SBE window on non-master processors covering the Hostboot VMM range, so that Hostboot dump and attention handling can be done via any processor chip. Change-Id: I2b276fa7ad38b8a1f58357c8968a2f7ed7346c1f CQ: SW414923 Backport: release-fips910 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52561 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* update pb data x on token ring init procedureDaniel Howe2017-12-141-1/+3
| | | | | | | | | | | | | | | | Change-Id: I0d96ff7ec8d3c7ad1a74edfed679984504079521 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50468 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50469 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Create better anti-deadlock strategy for vfsJaymes Wilks2017-12-121-1/+1
| | | | | | | | | | | | | | | | | | | | Addresses situations in the error paths of vfs resource provider where the handler may deadlock. As a precautionary measure, the same change was applied to secure PNOR resource provider just in case a new deadlock scenario gets introduced through future code changes. Change-Id: I1bda8c28ad9a3a1758cd6b8ae2e35f67c3e0572c RTC:176134 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50068 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Blacklist: Init PSI bridge BAR and FSP BAR properly for securityNick Bofferding2017-11-301-73/+1
| | | | | | | | | | | | | | Change-Id: I96639c0e61a101170802ba9a96cd785d0388e985 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50057 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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