diff options
Diffstat (limited to 'src')
29 files changed, 3538 insertions, 210 deletions
diff --git a/src/include/usr/hwpf/hwp/utility_procedures/mss_count_active_centaurs.H b/src/include/usr/hwpf/hwp/utility_procedures/mss_count_active_centaurs.H new file mode 100644 index 000000000..bd6cf09e7 --- /dev/null +++ b/src/include/usr/hwpf/hwp/utility_procedures/mss_count_active_centaurs.H @@ -0,0 +1,70 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/hwpf/hwp/utility_procedures/mss_count_active_centaurs.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_count_active_centaurs.H,v 1.1 2014/06/16 16:06:27 dcadiga Exp $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vpp_offset.H +// *! DESCRIPTION : see additional comments below +// *! OWNER NAME : Stephen Glancy Email: sglancy@us.ibm.com +// *! BACKUP NAME : Jacob Sloat Email: jdsloat@us.ibm.com +// *! ADDITIONAL COMMENTS : +// +// Header file for mss_volt. +// +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.2 | sglancy | 06/04/14 | Updated to include output attribute +// 1.1 | sglancy | 05/20/14 | initial drop +#ifndef MSS_COUNT_ACTIVE_CENT_H_ +#define MSS_COUNT_ACTIVE_CENT_H_ + +#include <fapi.H> + +typedef fapi::ReturnCode (*mss_count_active_centaurs_FP_t)(std::vector<fapi::Target> & , uint32_t & , uint32_t &); + +extern "C" +{ + +/** + * @brief mss_count_active_centaurs procedure. Determines operating vpp voltage for dimms behind a voltage domain + * + * @param[in] std::vector<fapi::Target> l_targets Reference to vector of Centaur Targets + * uint32_t & var_num_active_centaur - number of active centaurs - to be returned out of the function + * uint32_t & var_num_inactive_centaur - number of inactive centaurs - to be returned out of the function + * + * @return ReturnCode + */ + + fapi::ReturnCode mss_count_active_centaurs(std::vector<fapi::Target> & i_targets, uint32_t & var_num_active_centaur, uint32_t &var_num_inactive_centaur); + +} // extern "C" + +#endif // MSS_COUNT_ACTIVE_CENT_H_ diff --git a/src/usr/hwpf/hwp/dram_training/hbVddrMsg.C b/src/usr/hwpf/hwp/dram_training/hbVddrMsg.C index 9938f916a..3e4fa82ac 100644 --- a/src/usr/hwpf/hwp/dram_training/hbVddrMsg.C +++ b/src/usr/hwpf/hwp/dram_training/hbVddrMsg.C @@ -67,77 +67,231 @@ HBVddrMsg::~HBVddrMsg() /////////////////////////////////////////////////////////////////////////////// -// compareVids +// compareVids /////////////////////////////////////////////////////////////////////////////// -bool compareVids( HBVddrMsg::hwsvPowrVmemRequest_t i_req1, - HBVddrMsg::hwsvPowrVmemRequest_t i_req2) + +bool compareVids( + HBVddrMsg::hwsvPowrMemVoltDomainRequest_t i_lhs, + HBVddrMsg::hwsvPowrMemVoltDomainRequest_t i_rhs) { - return( static_cast<uint16_t>(i_req1.VmemId) < - static_cast<uint16_t>(i_req2.VmemId)); + bool lhsLogicallyBeforeRhs = (i_lhs.domain < i_rhs.domain); + + if (i_lhs.domain == i_rhs.domain) + { + lhsLogicallyBeforeRhs = ( static_cast<uint16_t>(i_lhs.domainId) + < static_cast<uint16_t>(i_rhs.domainId) ); + } + + return lhsLogicallyBeforeRhs; } /////////////////////////////////////////////////////////////////////////////// -// areVidEqual +// areVidsEqual /////////////////////////////////////////////////////////////////////////////// -bool areVidsEqual(HBVddrMsg::hwsvPowrVmemRequest_t i_req1, - HBVddrMsg::hwsvPowrVmemRequest_t i_req2) + +bool areVidsEqual( + HBVddrMsg::hwsvPowrMemVoltDomainRequest_t i_lhs, + HBVddrMsg::hwsvPowrMemVoltDomainRequest_t i_rhs) +{ + return( ( i_lhs.domain + == i_rhs.domain) + && ( static_cast<uint16_t>(i_lhs.domainId) + == static_cast<uint16_t>(i_rhs.domainId)) ); +} + +//****************************************************************************** +// addMemoryVoltageDomains (templated) +//****************************************************************************** + +template< + const ATTRIBUTE_ID OFFSET_DISABLEMENT_ATTR, + const ATTRIBUTE_ID VOLTAGE_ATTR_WHEN_OFFSET_ENABLED, + const ATTRIBUTE_ID VOLTAGE_ATTR_WHEN_OFFSET_DISABLED, + const ATTRIBUTE_ID VOLTAGE_DOMAIN_ID_ATTR > +void HBVddrMsg::addMemoryVoltageDomains( + const TARGETING::Target* const i_pMembuf, + HBVddrMsg::RequestContainer& io_domains) const { - return( static_cast<uint16_t>(i_req1.VmemId) == - static_cast<uint16_t>(i_req2.VmemId)); + assert( + (i_pMembuf != NULL), + "HBVddrMsg::addMemoryVoltageDomains: Code bug! Caller passed NULL " + "memory buffer target handle."); + + assert( + ( ( i_pMembuf->getAttr<TARGETING::ATTR_CLASS>() + == TARGETING::CLASS_CHIP) + && ( i_pMembuf->getAttr<TARGETING::ATTR_TYPE>() + == TARGETING::TYPE_MEMBUF)), + "HBVddrMsg::addMemoryVoltageDomains: Code bug! Caller passed non-" + "memory buffer target handle of class = 0x%08X and type of 0x%08X.", + i_pMembuf->getAttr<TARGETING::ATTR_CLASS>(), + i_pMembuf->getAttr<TARGETING::ATTR_TYPE>()); + + TARGETING::Target* pSysTarget = NULL; + TARGETING::targetService().getTopLevelTarget(pSysTarget); + + assert( + (pSysTarget != NULL), + "HBVddrMsg::addMemoryVoltageDomains: Code bug! System target was " + "NULL."); + + typename AttributeTraits< OFFSET_DISABLEMENT_ATTR >::Type + disableOffsetVoltage = + pSysTarget->getAttr< OFFSET_DISABLEMENT_ATTR >(); + + assert( + (disableOffsetVoltage <= true), + "HBVddrMsg::addMemoryVoltageDomains: Code Bug! Unsupported " + "value of 0x%02X for attribute ID of 0x%08X.", + disableOffsetVoltage, + OFFSET_DISABLEMENT_ATTR); + + // Initialized by constructor to invalid defaults + HBVddrMsg::hwsvPowrMemVoltDomainRequest_t entry; + + switch(VOLTAGE_DOMAIN_ID_ATTR) + { + case TARGETING::ATTR_VMEM_ID: + entry.domain = MEM_VOLTAGE_DOMAIN_VDDR; + break; + case TARGETING::ATTR_VCS_ID: + entry.domain = MEM_VOLTAGE_DOMAIN_VCS; + break; + case TARGETING::ATTR_VPP_ID: + entry.domain = MEM_VOLTAGE_DOMAIN_VPP; + break; + case TARGETING::ATTR_AVDD_ID: + entry.domain = MEM_VOLTAGE_DOMAIN_AVDD; + break; + case TARGETING::ATTR_VDD_ID: + entry.domain = MEM_VOLTAGE_DOMAIN_VDD; + break; + default: + assert( + 0, + "HBVddrMsg::addMemoryVoltageDomains: Code Bug! Unsupported " + "voltage domain of 0x%08X.", + VOLTAGE_DOMAIN_ID_ATTR); + break; + } + + // There is no reasonable check to validate if a voltage ID we're reading + // is valid so it has to be assumed good + entry.domainId = i_pMembuf->getAttr< VOLTAGE_DOMAIN_ID_ATTR >(); + + // There is no reasonable check to validate if a voltage we're + // reading is valid so it has to be assumed good for the cases below + if(!disableOffsetVoltage) + { + typename + TARGETING::AttributeTraits< VOLTAGE_ATTR_WHEN_OFFSET_ENABLED >::Type + voltageMillivolts + = i_pMembuf->getAttr< VOLTAGE_ATTR_WHEN_OFFSET_ENABLED >(); + + entry.voltageMillivolts = static_cast<uint32_t>(voltageMillivolts); + io_domains.push_back(entry); + } + else if( VOLTAGE_ATTR_WHEN_OFFSET_DISABLED + != VOLTAGE_ATTR_WHEN_OFFSET_ENABLED) + { + typename + TARGETING::AttributeTraits< VOLTAGE_ATTR_WHEN_OFFSET_DISABLED >::Type + voltageMillivolts + = i_pMembuf->getAttr< VOLTAGE_ATTR_WHEN_OFFSET_DISABLED >(); + + entry.voltageMillivolts = static_cast<uint32_t>(voltageMillivolts); + io_domains.push_back(entry); + } } /////////////////////////////////////////////////////////////////////////////// // HBVddrMsg::createVddrData /////////////////////////////////////////////////////////////////////////////// + void HBVddrMsg::createVddrData( - RequestContainer& io_request) const + const VDDR_MSG_TYPE i_requestType, + RequestContainer& io_request) const { TRACFCOMP( g_trac_volt, ENTER_MRK "HBVddrMsg::createVddrData" ); - //go through all the centaurs and gather the Voltage IDs and voltages + // Go through all the memory buffers and gather their domains, domain + // specific IDs, and domain specific voltages io_request.clear(); do{ - - TARGETING::TargetHandleList l_membufTargetList; - getAllChips(l_membufTargetList, TYPE_MEMBUF); - - TARGETING::Target* l_Target =NULL; - hwsvPowrVmemRequest_t l_entry; + TARGETING::TargetHandleList membufTargetList; + getAllChips(membufTargetList, TYPE_MEMBUF); + TARGETING::Target* pMembuf =NULL; for (TARGETING::TargetHandleList::const_iterator - membufIter = l_membufTargetList.begin(); - membufIter != l_membufTargetList.end(); - ++membufIter) + ppMembuf = membufTargetList.begin(); + ppMembuf != membufTargetList.end(); + ++ppMembuf) { - l_Target = *membufIter; - - TARGETING::ATTR_VMEM_ID_type l_VmemId= - l_Target->getAttr<TARGETING::ATTR_VMEM_ID>(); - TARGETING::ATTR_MSS_VOLT_type l_voltage = - l_Target->getAttr<TARGETING::ATTR_MSS_VOLT>(); + pMembuf = *ppMembuf; - l_entry.VmemId = l_VmemId; - l_entry.Voltage = static_cast<uint32_t>(l_voltage); + if(i_requestType == HB_VDDR_ENABLE) + { + (void)addMemoryVoltageDomains< + TARGETING::ATTR_MSS_CENT_VDD_OFFSET_DISABLE, + TARGETING::ATTR_MEM_VDD_OFFSET_MILLIVOLTS, + TARGETING::ATTR_MEM_VDD_OFFSET_MILLIVOLTS, + TARGETING::ATTR_VDD_ID>( + pMembuf, + io_request); + + (void)addMemoryVoltageDomains< + TARGETING::ATTR_MSS_CENT_AVDD_OFFSET_DISABLE, + TARGETING::ATTR_MEM_AVDD_OFFSET_MILLIVOLTS, + TARGETING::ATTR_MEM_AVDD_OFFSET_MILLIVOLTS, + TARGETING::ATTR_AVDD_ID>( + pMembuf, + io_request); + + (void)addMemoryVoltageDomains< + TARGETING::ATTR_MSS_CENT_VCS_OFFSET_DISABLE, + TARGETING::ATTR_MEM_VCS_OFFSET_MILLIVOLTS, + TARGETING::ATTR_MEM_VCS_OFFSET_MILLIVOLTS, + TARGETING::ATTR_VCS_ID>( + pMembuf, + io_request); + + // VPP programming not supported in 820 + // TODO via RTC: 110388 + //(void)addMemoryVoltageDomains< + // TARGETING::ATTR_MSS_VOLT_VPP_OFFSET_DISABLE, + // TARGETING::ATTR_MEM_VPP_OFFSET_MILLIVOLTS, + // TARGETING::ATTR_VPP_BASE, + // TARGETING::ATTR_VPP_ID>( + // pMembuf, + // io_request); + } - io_request.push_back(l_entry); + (void)addMemoryVoltageDomains< + TARGETING::ATTR_MSS_VOLT_VDDR_OFFSET_DISABLE, + TARGETING::ATTR_MEM_VDDR_OFFSET_MILLIVOLTS, + TARGETING::ATTR_MSS_VOLT, + TARGETING::ATTR_VMEM_ID>( + pMembuf, + io_request); } - if (l_membufTargetList.size() >1) + if (membufTargetList.size() > 1) { - //take out the duplicates Voltage IDs in io_request by first sorting - //and then removing the duplicates - + // Take out the duplicate records in io_request by first + // sorting and then removing the duplicates std::sort(io_request.begin(), io_request.end(), compareVids); - - std::vector<hwsvPowrVmemRequest_t>::iterator it; - it=std::unique(io_request.begin(), io_request.end(), areVidsEqual); - io_request.erase(it,io_request.end()); + std::vector<hwsvPowrMemVoltDomainRequest_t>::iterator + pInvalidEntries = std::unique( + io_request.begin(), + io_request.end(), + areVidsEqual); + io_request.erase(pInvalidEntries,io_request.end()); } - }while(0); - + } while(0); + TRACFCOMP( g_trac_volt, EXIT_MRK "HBVddrMsg::createVddrData" ); return; } @@ -157,7 +311,9 @@ errlHndl_t HBVddrMsg::sendMsg(uint32_t i_msgType) const if ( (i_msgType == HB_VDDR_ENABLE) || (i_msgType == HB_VDDR_DISABLE) ) { - createVddrData(l_request); + VDDR_MSG_TYPE msgType = (i_msgType == HB_VDDR_ENABLE) + ? HB_VDDR_ENABLE : HB_VDDR_DISABLE; + createVddrData(msgType, l_request); } else { @@ -184,7 +340,8 @@ errlHndl_t HBVddrMsg::sendMsg(uint32_t i_msgType) const // Only send a message if there is data to send if (l_dataCount) { - uint32_t l_msgSize = l_dataCount*sizeof(hwsvPowrVmemRequest_t); + uint32_t l_msgSize = l_dataCount * + sizeof(hwsvPowrMemVoltDomainRequest_t); // Create the message to send to HWSV msg_t* l_msg = msg_allocate(); @@ -192,21 +349,26 @@ errlHndl_t HBVddrMsg::sendMsg(uint32_t i_msgType) const l_msg->data[0] = 0; l_msg->data[1] = l_msgSize; - TRACFCOMP(g_trac_volt, INFO_MRK "hbVddrMsg::l_dataCount=%d,l_msgSize=%d", + TRACFCOMP(g_trac_volt, INFO_MRK "hbVddrMsg::l_dataCount=%d, " + "l_msgSize=%d", l_dataCount, l_msgSize); void* l_data = malloc(l_msgSize); - hwsvPowrVmemRequest_t* l_ptr = - reinterpret_cast<hwsvPowrVmemRequest_t*>(l_data); + hwsvPowrMemVoltDomainRequest_t* l_ptr = + reinterpret_cast<hwsvPowrMemVoltDomainRequest_t*>(l_data); for (size_t j =0; j<l_dataCount; ++j) { - l_ptr->VmemId=l_request.at(j).VmemId; - l_ptr->Voltage=l_request.at(j).Voltage; + l_ptr->domain=l_request.at(j).domain; + l_ptr->domainId=l_request.at(j).domainId; + l_ptr->voltageMillivolts=l_request.at(j).voltageMillivolts; TRACFCOMP(g_trac_volt, ENTER_MRK "hbVddrMsg::sendMsg " - "VmemId=0x%04X, Voltage=%d, index=%d", - l_ptr->VmemId, l_ptr->Voltage,j); + "Voltage domain type = 0x%08X, " + "Voltage domain ID = 0x%04X, " + "Voltage (mV) = %d, index = %d", + l_ptr->domain, + l_ptr->domainId, l_ptr->voltageMillivolts,j); l_ptr++; } @@ -249,7 +411,7 @@ errlHndl_t HBVddrMsg::processVDDRmsg(msg_t* i_recvMsg) const //and is inside the message uint32_t l_msgSize = i_recvMsg->data[1]; - uint16_t l_elementCount = l_msgSize/sizeof(hwsvPowrVmemReply_t); + uint16_t l_elementCount = l_msgSize/sizeof(hwsvPowrMemVoltDomainReply_t); const uint8_t* l_extraData = NULL; l_extraData=static_cast<uint8_t*>(i_recvMsg->extra_data); @@ -274,26 +436,31 @@ errlHndl_t HBVddrMsg::processVDDRmsg(msg_t* i_recvMsg) const fapi::RC_VDDR_EMPTY_MSG); break; } - TARGETING::ATTR_VMEM_ID_type l_VmemId =0x0; + + MEM_VOLTAGE_DOMAIN domain = MEM_VOLTAGE_DOMAIN_UNKNOWN; + TARGETING::ATTR_VMEM_ID_type l_domainId =0x0; uint32_t l_errPlid =0x0; TRACFCOMP( g_trac_volt, INFO_MRK "HBVddrMsg::processVDDRmsg: " "l_elementCount=%d, l_msgSize =%d", l_elementCount, l_msgSize); - const hwsvPowrVmemReply_t* l_ptr= - reinterpret_cast<const hwsvPowrVmemReply_t*>(l_extraData); + const hwsvPowrMemVoltDomainReply_t* l_ptr= + reinterpret_cast<const hwsvPowrMemVoltDomainReply_t*>(l_extraData); for (size_t i=0; i<l_elementCount; ++i) { - l_VmemId = l_ptr->VmemId; + domain = l_ptr->domain; + l_domainId = l_ptr->domainId; l_errPlid = l_ptr->plid; TRACFCOMP( g_trac_volt, INFO_MRK "HBVddrMsg::processVDDRmsg: " - "l_VmemId=0x%08X, l_errPlid=0x%08X", l_VmemId,l_errPlid); + "domain = 0x%08X, l_domainId=0x%08X, l_errPlid=0x%08X", + domain,l_domainId,l_errPlid); if (l_errPlid ==0x0) { - TRACFCOMP( g_trac_volt, INFO_MRK "HBVddrMsg::processVDDRmsg: no plid " - "error found for l_VmemId=0x%08X", l_VmemId); + TRACFCOMP( g_trac_volt, INFO_MRK "HBVddrMsg::processVDDRmsg: " + "no plid error found for domain = 0x%08X, " + "l_domainId=0x%08X", domain, l_domainId); } else { diff --git a/src/usr/hwpf/hwp/dram_training/hbVddrMsg.H b/src/usr/hwpf/hwp/dram_training/hbVddrMsg.H index 4d71237cf..f04019919 100644 --- a/src/usr/hwpf/hwp/dram_training/hbVddrMsg.H +++ b/src/usr/hwpf/hwp/dram_training/hbVddrMsg.H @@ -45,6 +45,7 @@ #include <targeting/common/targetservice.H> #include <targeting/common/utilFilter.H> #include <hwpf/hwpf_reasoncodes.H> +#include <attributeenums.H> /*****************************************************************************/ // Forward class declarations @@ -61,44 +62,69 @@ class HBVddrMsg { public: + /** - * @struct hwsvPowrVmemRequest_t - * - * @brief structure to contain the Vmem Voltage rail ID and - * its corresponding voltage + * @brief Enum specifying a memory voltage domain type + */ + enum MEM_VOLTAGE_DOMAIN + { + // For unknown / uninitialized values + MEM_VOLTAGE_DOMAIN_UNKNOWN = 0x00, + + // Valid values + MEM_VOLTAGE_DOMAIN_VDD = 0x01, + MEM_VOLTAGE_DOMAIN_AVDD = 0x02, + MEM_VOLTAGE_DOMAIN_VCS = 0x03, + MEM_VOLTAGE_DOMAIN_VPP = 0x04, + MEM_VOLTAGE_DOMAIN_VDDR = 0x05, + + // Good range markers - Need to be adjusted if the above change + MEM_VOLTAGE_DOMAIN_MIN_VALUE = MEM_VOLTAGE_DOMAIN_VDD, + MEM_VOLTAGE_DOMAIN_MAX_VALUE = MEM_VOLTAGE_DOMAIN_VDDR, + }; + + /** + * @struct hwsvPowrMemVoltDomainRequest_t * + * @brief Structure containing a memory voltage domain type, ID, and + * voltage in mV */ - struct hwsvPowrVmemRequest_t + struct hwsvPowrMemVoltDomainRequest_t { - TARGETING::ATTR_VMEM_ID_type VmemId; - TARGETING::ATTR_MSS_VOLT_type Voltage; - - hwsvPowrVmemRequest_t() + MEM_VOLTAGE_DOMAIN domain; + TARGETING::ATTR_VMEM_ID_type domainId; + TARGETING::ATTR_MSS_VOLT_type voltageMillivolts; + + hwsvPowrMemVoltDomainRequest_t() + : domain(MEM_VOLTAGE_DOMAIN_UNKNOWN), + domainId(0x0000), + voltageMillivolts(0x00000000) { - VmemId=0x0; - Voltage=0; } - }__attribute__ ((packed)); + + } __attribute__ ((packed)); /** - * @struct hwsvPowrVmemReply_t - * - * @brief structure to contain the Vmem Voltage rail ID and - * its corresponding errorlog plid from the powr function - * call + * @struct hwsvPowrMemVoltDomainReply_t * + * @brief Structure containing a memory voltage domain type, ID, and error + * log PLID as returned by the FSP POWR function when it tried to set + * the implied voltage regulator to the specified voltage. */ - struct hwsvPowrVmemReply_t + struct hwsvPowrMemVoltDomainReply_t { - TARGETING::ATTR_VMEM_ID_type VmemId; - uint32_t plid; - - hwsvPowrVmemReply_t() + MEM_VOLTAGE_DOMAIN domain; + TARGETING::ATTR_VMEM_ID_type domainId; + uint32_t plid; + + hwsvPowrMemVoltDomainReply_t() + : domain(MEM_VOLTAGE_DOMAIN_UNKNOWN), + domainId(0x0000), + plid(0x00000000) { - VmemId=0x0; - plid=0x0; } - }__attribute__ ((packed)); + + } __attribute__ ((packed)); /** * @enum VDDR_MSG_TYPE @@ -112,45 +138,50 @@ public: HB_VDDR_DISABLE = 0x40000042, }; - /** + /** * @brief typedefs for containers for structures */ - typedef std::vector<hwsvPowrVmemReply_t> ResponseContainer; - typedef std::vector<hwsvPowrVmemRequest_t> RequestContainer; + typedef std::vector<hwsvPowrMemVoltDomainReply_t> ResponseContainer; + typedef std::vector<hwsvPowrMemVoltDomainRequest_t> RequestContainer; /** * @brief Default constructor */ HBVddrMsg(); - + /** * @brief Destructor * - * Releases all resources owned by the handle. + * Releases all resources owned by the handle. * * @return None * */ ~HBVddrMsg(); - /** - * @brief Uses the internal mailbox to send a message to the FSP - * - * - * @par Detailed Description: - * This funciton will create the request message by - * going through the attributes and correlating the - * VID and Voltage into the final message for all the - * VIDs in the system - * - * @param[in/out] io_request - * Contains the voltage and VID pairs to be passed - * to hwsvd on the FSP. - * - * @return None - */ - void createVddrData(RequestContainer& io_request)const; + * @brief Accumulates memory voltage domain type/ID/voltage records and + * appends them to the provided container + * + * @par Detailed Description: + * This function will accumulates memory voltage domain type/ID/voltage + * records and appends them to the provided container. If an "enable" + * request, adds records from all memory voltage domains. If a + * "disable" message, only adds records from the VDDR (a.k.a. VMEM) + * voltage domain. + * + * @param[in] i_requestType + * Type of data accumulation request + * + * @param[in/out] io_request + * On input, a container to hold the memory voltage domain programming + * records. On output, the container holds the relevant records. + * + * @return N/A + */ + void createVddrData( + const VDDR_MSG_TYPE i_requestType, + RequestContainer& io_request) const; /** * @brief Uses the internal mailbox to send a message to the FSP @@ -170,14 +201,66 @@ public: */ errlHndl_t sendMsg(uint32_t i_msgType) const; +private: -protected: + /** + * @brief For a given memory buffer and memory voltage domain, adds a + * voltage programming request record to the input list + * + * @tparam OFFSET_DISABLEMENT_ATTR + * ID of the attribute to read to determine if a given memory voltage + * domain offset voltage should be applied or not. Should be one of + * the TARGETING::ATTR_*_ID attribute IDs, where * = VMEM, VPP, VCS, + * VDD, or AVDD. + * + * @tparam VOLTAGE_ATTR_WHEN_OFFSET_ENABLED + * ID of the attribute which should be read to obtain the given memory + * voltage domain's offset voltage to program. In this case the offset + * voltage acts as the actual voltage. Should be one of the + * TARGETING::ATTR_MEM_*_OFFSET_MILLIVOLTS attribute IDs, where + * * = VMEM, VPP, VCS, VDD, or AVDD. Only used when the memory voltage + * domain's offset voltage is enabled. Otherwise the parameter, below, + * controls how the voltage, if any, is programmed. + * + * @tparam VOLTAGE_ATTR_WHEN_OFFSET_DISABLED + * ID of the attribute which should be read to obtain the given memory + * voltage domain's voltage to program. Only applied if the memory + * voltage domain's offset voltage is disabled -AND- the attribute ID + * is different than the one given by + * VOLTAGE_ATTR_WHEN_OFFSET_ENABLED. Should be one of + * TARGETING::ATTR_VPP_BASE, TARGETING::ATTR_MSS_VOLT, or + * TARGETING::ATTR_MEM_*_OFFSET_MILLIVOLTS where * = VPP, AVDD, or + * VCS. + * + * @note: This function does not ensure that all permutations of the above + * template parameters are valid. + * + * @param[in] i_pMembuf + * Handle to a memory buffer target. Function will assert if NULL or + * not a memory buffer target. + * + * @param[in,out] io_domains + * On input, an existing list of 0 or more voltage domain records. On + * output, that same list with up to 1 additional voltage domain + * record. + * + * @return N/A + */ + template< + const TARGETING::ATTRIBUTE_ID OFFSET_DISABLEMENT_ATTR, + const TARGETING::ATTRIBUTE_ID VOLTAGE_ATTR_WHEN_OFFSET_ENABLED, + const TARGETING::ATTRIBUTE_ID VOLTAGE_ATTR_WHEN_OFFSET_DISABLED, + const TARGETING::ATTRIBUTE_ID VOLTAGE_DOMAIN_ID_ATTR > + void addMemoryVoltageDomains( + const TARGETING::Target* const i_pMembuf, + HBVddrMsg::RequestContainer& io_domains) const; +protected: /** * @brief function to process a generic message recieved from the FSP * - * @param[in] i_recvMsg The message from the message queue. + * @param[in] i_recvMsg The message from the message queue. * It contains the response data from the FSP * * @return errlHndl_t @@ -189,11 +272,11 @@ protected: /** * @brief function to process a power Vmem message recieved from the FSP * - * @param[in] i_recvMsg The message from the message queue. + * @param[in] i_recvMsg The message from the message queue. * It contains the response data from the FSP * - * @param[out] i_passed indicates if powr function succeeded or failed on the - * FSP. + * @param[out] i_passed indicates if powr function succeeded or failed on + * the FSP. * * @return errlHndl_t * return errl == NULL -> success @@ -204,9 +287,9 @@ protected: /** * @brief function to create error logs for errors that occured in FSP side * - * @param[in/out] io_err. Error log to generate indicating that an error has - * has occured on HB or in the powr messages. This error - * should stop the IPL from processing further. + * @param[in/out] io_err. Error log to generate indicating that an error + * has has occured on HB or in the powr messages. This error + * should stop the IPL from processing further. * * @param[in] i_mod. The module where the error occured * diff --git a/src/usr/hwpf/hwp/mc_config/makefile b/src/usr/hwpf/hwp/mc_config/makefile index 7d5aad85e..f6cd0e9f2 100644 --- a/src/usr/hwpf/hwp/mc_config/makefile +++ b/src/usr/hwpf/hwp/mc_config/makefile @@ -29,6 +29,8 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/fapi EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/plat EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/ +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/hwpf/hwp/utility_procedures/ ## pointer to common HWP files EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/include @@ -61,6 +63,12 @@ OBJS += mss_error_support.o OBJS += mss_eff_pre_config.o OBJS += mss_attr_cleanup.o OBJS += mss_eff_mb_interleave.o +OBJS += mss_volt_vdd_offset.o +OBJS += mss_volt_avdd_offset.o +OBJS += mss_volt_vcs_offset.o +OBJS += mss_volt_vpp_offset.o +OBJS += mss_volt_vddr_offset.o +OBJS += mss_count_active_centaurs.o ## NOTE: add a new directory onto the vpaths when you add a new HWP ##@ VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/??? diff --git a/src/usr/hwpf/hwp/mc_config/mc_config.C b/src/usr/hwpf/hwp/mc_config/mc_config.C index 9d6f9a460..1ad4c3eea 100644 --- a/src/usr/hwpf/hwp/mc_config/mc_config.C +++ b/src/usr/hwpf/hwp/mc_config/mc_config.C @@ -67,6 +67,11 @@ #include "mss_eff_config/opt_memmap.H" #include "mss_attr_cleanup/mss_attr_cleanup.H" #include "mss_eff_mb_interleave/mss_eff_mb_interleave.H" +#include "mss_volt/mss_volt_avdd_offset.H" +#include "mss_volt/mss_volt_vcs_offset.H" +#include "mss_volt/mss_volt_vdd_offset.H" +#include "mss_volt/mss_volt_vddr_offset.H" +#include "mss_volt/mss_volt_vpp_offset.H" namespace MC_CONFIG { @@ -175,10 +180,245 @@ void* call_host_collect_dimm_spd( void *io_pArgs ) return l_stepError.getErrorHandle(); } +/** + * @brief Compares two memory buffer targets based on the voltage domain ID for + * the voltage domain given by the template parameter. Used for sorting + * memory buffer targets within containers. API should be called in well + * controlled conditions where the input restrictions can be guaranteed. + * + * @param[in] i_pMembufLhs + * Left hand side memory buffer target. Must be a memory buffer target, + * and must not be NULL. These conditions are not enforced internally. + * + * @param[in] i_pMembufRhs + * Right hand side memory buffer target. Must be a memory buffer target, + * and must not be NULL. These conditions are not enforced internally. + * + * @tparam VOLTAGE_DOMAIN_ID_ATTR + * Attribute corresponding to voltage domain to compare + * + * @return Bool indicating whether LHS memory buffer target's voltage domain ID + * for the specified domain logically precedes the RHS memory buffer + * target's voltage domain ID for the same domain + */ +template < const TARGETING::ATTRIBUTE_ID VOLTAGE_DOMAIN_ID_ATTR> +bool _compareMembufWrtVoltageDomain( + TARGETING::Target* i_pMembufLhs, + TARGETING::Target* i_pMembufRhs) +{ + typename TARGETING::AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type + lhsDomain = i_pMembufLhs->getAttr<VOLTAGE_DOMAIN_ID_ATTR>(); + typename TARGETING::AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type + rhsDomain = i_pMembufRhs->getAttr<VOLTAGE_DOMAIN_ID_ATTR>(); + + return lhsDomain < rhsDomain; +} + +//****************************************************************************** +// setMemoryVoltageDomainOffsetVoltage +//****************************************************************************** + +// TODO via RTC: 110777 +// Optimize setMemoryVoltageDomainOffsetVoltage into templated and non-templated +// pieces to reduce code size + +template< const ATTRIBUTE_ID OFFSET_DISABLEMENT_ATTR, + const ATTRIBUTE_ID OFFSET_VOLTAGE_ATTR, + const ATTRIBUTE_ID VOLTAGE_DOMAIN_ID_ATTR > +errlHndl_t setMemoryVoltageDomainOffsetVoltage() +{ + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "setMemoryVoltageDomainOffsetVoltage enter"); + + errlHndl_t pError = NULL; + + do { + + TARGETING::Target* pSysTarget = NULL; + TARGETING::targetService().getTopLevelTarget(pSysTarget); + assert(pSysTarget != NULL,"System target was NULL."); + + typename AttributeTraits< OFFSET_DISABLEMENT_ATTR >::Type + disableOffsetVoltage = + pSysTarget->getAttr< OFFSET_DISABLEMENT_ATTR >(); + + if(disableOffsetVoltage) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "INFO: Offset voltage processing disabled for domain type 0x%08X.", + OFFSET_DISABLEMENT_ATTR); + break; + } + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "INFO: Offset voltage processing enabled for domain type 0x%08X.", + OFFSET_DISABLEMENT_ATTR); + + typedef fapi::ReturnCode (*pOffsetFn_t)(std::vector<fapi::Target>&); + + struct { + + TARGETING::ATTRIBUTE_ID domain; + pOffsetFn_t fn; + const char* fnName; + + } fnMap[] = { + + {TARGETING::ATTR_AVDD_ID, + mss_volt_avdd_offset,"mss_volt_avdd_offset"}, + {TARGETING::ATTR_VDD_ID , + mss_volt_vdd_offset ,"mss_volt_vdd_offset"}, + {TARGETING::ATTR_VCS_ID , + mss_volt_vcs_offset ,"mss_volt_vcs_offset"}, + {TARGETING::ATTR_VMEM_ID, + mss_volt_vddr_offset,"mss_volt_vddr_offset"}, + {TARGETING::ATTR_VPP_ID , + mss_volt_vpp_offset ,"mss_volt_vpp_offset"} + }; + + size_t recordIndex = 0; + const size_t records = sizeof(fnMap)/sizeof(fnMap[0]); + for(; recordIndex<records; ++recordIndex) + { + if(VOLTAGE_DOMAIN_ID_ATTR == fnMap[recordIndex].domain) + { + break; + } + } + + if(recordIndex >= records) + { + assert(recordIndex < records, + "Code bug! Called setMemoryVoltageDomainOffsetVoltage " + "using unsupported voltage offset attribute type of 0x%08X.", + VOLTAGE_DOMAIN_ID_ATTR); + break; + } + + TARGETING::TargetHandleList membufTargetList; + + // Must pull ALL present memory buffers (not just functional) for these + // computations + getChipResources(membufTargetList, TYPE_MEMBUF, + TARGETING::UTIL_FILTER_PRESENT); + + std::sort(membufTargetList.begin(), membufTargetList.end(), + _compareMembufWrtVoltageDomain< VOLTAGE_DOMAIN_ID_ATTR >); + + std::vector<fapi::Target> membufFapiTargetsList; + typename AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type lastDomainId + = 0; + + if(!membufTargetList.empty()) + { + lastDomainId = + (*membufTargetList.begin())->getAttr<VOLTAGE_DOMAIN_ID_ATTR>(); + } + + // O(n) algorithm to execute HWPs on groups of memory buffers. As the + // memory buffers are sorted in order of domain ID (several records in a row + // might have same domain ID), walk down the list accumulating targets for + // the HWP until the domain ID changes. The first record is not considered + // a change. At the time the change is detected, run the HWP on the set of + // accumulated targets, clear the list, and accumulate the target with a new + // domain ID as the start of the new list. When we hit end of list, we + // might add this last target to a new accumulation, so we have to go back + // through the loop one more time to process it (being careful not to do + // unholy things to the iterator, etc.) + + // Prevent running the HWP on the first target. Var is used to push us + // through the loop after we exhausted all the targets + bool last = membufTargetList.empty(); + for (TargetHandleList::const_iterator + ppPresentMembuf = membufTargetList.begin(); + ((ppPresentMembuf != membufTargetList.end()) || (last == false)); + ++ppPresentMembuf) + { + // If no valid target to process, this is our last time through the loop + last = (ppPresentMembuf == membufTargetList.end()); + + typename AttributeTraits< VOLTAGE_DOMAIN_ID_ATTR >::Type + currentDomainId = last ? lastDomainId : + (*ppPresentMembuf)->getAttr<VOLTAGE_DOMAIN_ID_ATTR>(); + + // Invoke the HWP if the domain ID in the sorted list change relative to + // prior entry or this is our final time through the loop (and there is + // a list entry to process) + if( ( (currentDomainId != lastDomainId) + || (last)) + && (!membufFapiTargetsList.empty()) ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "INFO invoking %s on domain type 0x%08X, ID 0x%08X", + fnMap[recordIndex].fnName, + VOLTAGE_DOMAIN_ID_ATTR, lastDomainId); + + FAPI_INVOKE_HWP( + pError, + fnMap[recordIndex].fn, + membufFapiTargetsList); + + if (pError) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: %s", + pError->reasonCode(),fnMap[recordIndex].fnName); + break; + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : %s",fnMap[recordIndex].fnName ); + } + + membufFapiTargetsList.clear(); + + lastDomainId = currentDomainId; + } + + // If not the last time through loop, there is a new target to + // accumulate + if(!last) + { + const TARGETING::Target* pPresentMembuf = *ppPresentMembuf; + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "===== add to fapi::Target vector attr type=0x%08X, " + "id=0x%08X, target HUID=0x%08X", + VOLTAGE_DOMAIN_ID_ATTR, + pPresentMembuf->getAttr<VOLTAGE_DOMAIN_ID_ATTR>(), + TARGETING::get_huid(pPresentMembuf)); + + fapi::Target membufFapiTarget(fapi::TARGET_TYPE_MEMBUF_CHIP, + (const_cast<TARGETING::Target*>(pPresentMembuf)) ); + + membufFapiTargetsList.push_back(membufFapiTarget); + } + // Otherwise need to bail, lest we increment the iterator again, which + // is undefined + else + { + break; + } + } + + if(pError) + { + break; + } + + } while(0); + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "setMemoryVoltageDomainOffsetVoltage exit"); + + return pError; +} + // // Wrapper function to call mss_volt // -void* call_mss_volt( void *io_pArgs ) +void* call_mss_volt( void *io_pArgs ) { errlHndl_t l_err = NULL; @@ -199,7 +439,7 @@ void* call_mss_volt( void *io_pArgs ) { TARGETING::ATTR_VMEM_ID_type l_VmemID = (*l_membuf_iter)->getAttr<ATTR_VMEM_ID>(); - l_VmemList.push_back(l_VmemID); + l_VmemList.push_back(l_VmemID); } std::sort(l_VmemList.begin(), l_VmemList.end()); @@ -232,20 +472,20 @@ void* call_mss_volt( void *io_pArgs ) "target HUID %.8X", l_membuf_target->getAttr<ATTR_VMEM_ID>(), TARGETING::get_huid(l_membuf_target)); - + fapi::Target l_membuf_fapi_target(fapi::TARGET_TYPE_MEMBUF_CHIP, (const_cast<TARGETING::Target*>(l_membuf_target)) ); l_membufFapiTargets.push_back( l_membuf_fapi_target ); } } - + //now have the a list of fapi membufs with just the one VmemId //call the HWP on the list of fapi targets TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "===== mss_volt HWP( vector )" ); FAPI_INVOKE_HWP(l_err, mss_volt, l_membufFapiTargets); - + // process return code. if ( l_err ) { @@ -267,7 +507,73 @@ void* call_mss_volt( void *io_pArgs ) } // endfor + l_err = setMemoryVoltageDomainOffsetVoltage< + TARGETING::ATTR_MSS_CENT_VDD_OFFSET_DISABLE, + TARGETING::ATTR_MEM_VDD_OFFSET_MILLIVOLTS, + TARGETING::ATTR_VDD_ID>(); + if(l_err) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VDD domain", + l_err->reasonCode()); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err,HWPF_COMP_ID); + } + + l_err = setMemoryVoltageDomainOffsetVoltage< + TARGETING::ATTR_MSS_CENT_AVDD_OFFSET_DISABLE, + TARGETING::ATTR_MEM_AVDD_OFFSET_MILLIVOLTS, + TARGETING::ATTR_AVDD_ID>(); + if(l_err) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for AVDD domain", + l_err->reasonCode()); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err,HWPF_COMP_ID); + } + + l_err = setMemoryVoltageDomainOffsetVoltage< + TARGETING::ATTR_MSS_CENT_VCS_OFFSET_DISABLE, + TARGETING::ATTR_MEM_VCS_OFFSET_MILLIVOLTS, + TARGETING::ATTR_VCS_ID>(); + if(l_err) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VCS domain", + l_err->reasonCode()); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err,HWPF_COMP_ID); + } + + l_err = setMemoryVoltageDomainOffsetVoltage< + TARGETING::ATTR_MSS_VOLT_VPP_OFFSET_DISABLE, + TARGETING::ATTR_MEM_VPP_OFFSET_MILLIVOLTS, + TARGETING::ATTR_VPP_ID>(); + if(l_err) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VPP domain", + l_err->reasonCode()); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err,HWPF_COMP_ID); + } + + l_err = setMemoryVoltageDomainOffsetVoltage< + TARGETING::ATTR_MSS_VOLT_VDDR_OFFSET_DISABLE, + TARGETING::ATTR_MEM_VDDR_OFFSET_MILLIVOLTS, + TARGETING::ATTR_VMEM_ID>(); + if(l_err) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%08X: setMemoryVoltageDomainOffsetVoltage for VDDR domain", + l_err->reasonCode()); + l_StepError.addErrorDetails(l_err); + errlCommit(l_err,HWPF_COMP_ID); + } + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_volt exit" ); + return l_StepError.getErrorHandle(); } diff --git a/src/usr/hwpf/hwp/mc_config/mc_config.H b/src/usr/hwpf/hwp/mc_config/mc_config.H index 59a084a59..12b25b36c 100644 --- a/src/usr/hwpf/hwp/mc_config/mc_config.H +++ b/src/usr/hwpf/hwp/mc_config/mc_config.H @@ -92,7 +92,40 @@ namespace MC_CONFIG */ void* call_host_collect_dimm_spd( void * io_pArgs ); - +/** + * @brief For a given memory voltage domain, program the domain's offset + * voltage if this behavior is enabled, otherwise program 0 + * + * @tparam OFFSET_DISABLEMENT_ATTR + * ID of the attribute to read to determine if a given memory voltage + * domain offset voltage should be applied or not. Should be one of + * the TARGETING::ATTR_*_ID attribute IDs, where * = VMEM, VPP, VCS, + * VDD, or AVDD. + * + * @tparam OFFSET_VOLTAGE_ATTR + * ID of the attribute to receive the given voltage domain's offset voltage + * value. Should be one of the TARGETING::ATTR_MEM_*_OFFSET_MILLIVOLTS + * attribute IDs, where * = VMEM, VPP, VCS, VDD, or AVDD. Only set to + * non-zero when memory voltage domain's offset voltage is enabled. + * + * @tparam VOLTAGE_DOMAIN_ID_ATTR + * ID of the attribute which should be read to obtain the given memory + * voltage domain's ID. IDs are only unique within the same memory voltage + * domain type. Must be one of the ATTR_*_ID attributes, where * = VPP, + * AVDD, VMEM, VDD, VCS. + * + * @note: This function does not ensure that all permutations of the above + * template parameters are valid. + * + * @return Error log handle indicating the status of the request. + * + * @retval NULL Offset voltage successfully programmed or set to 0 + * @retval Failed setting correct offset voltage + */ +template< const TARGETING::ATTRIBUTE_ID OFFSET_DISABLEMENT_ATTR, + const TARGETING::ATTRIBUTE_ID OFFSET_VOLTAGE_ATTR, + const TARGETING::ATTRIBUTE_ID VOLTAGE_DOMAIN_ID_ATTR > +errlHndl_t setMemoryVoltageDomainOffsetVoltage(); /** * @brief mss_volt diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt.xml b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt.xml index a72d84c0c..83cf9456e 100644 --- a/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt.xml +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt.xml @@ -22,7 +22,7 @@ <!-- IBM_PROLOG_END_TAG --> <hwpErrors> -<!-- $Id: memory_mss_volt.xml,v 1.2 2014/03/06 00:11:14 jdsloat Exp $ --> +<!-- $Id: memory_mss_volt.xml,v 1.3 2014/06/19 18:41:16 jdsloat Exp $ --> <!-- For file ../../ipl/fapi/mss_volt.C --> <!-- // *! OWNER NAME : Jacob Sloat (jdsloat@us.ibm.com) --> <!-- // *! BACKUP NAME : --> @@ -80,5 +80,26 @@ </deconfigure> </hwpError> + <hwpError> + <rc>RC_MSS_VOLT_OVERIDE_MIXING</rc> + <description>An override is trying to be applied to only a part of the voltage domain. It needs to be applied to the entire domain.</description> + <ffdc>OVERRIDE_TYPE</ffdc> + <ffdc>OVERRIDE_DOMAIN_TYPE</ffdc> + <callout> + <target>MEMB_TARGET</target> + <priority>HIGH</priority> + </callout> + </hwpError> + + <hwpError> + <rc>RC_MSS_VOLT_OVERIDE_UKNOWN</rc> + <description>An uknown override is trying to be applied to the voltage domain. It needs to be none, 1.2 or 1.35V. </description> + <ffdc>OVERRIDE_TYPE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + </hwpErrors> diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_avdd_offset.xml b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_avdd_offset.xml new file mode 100644 index 000000000..a66d31391 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_avdd_offset.xml @@ -0,0 +1,45 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_avdd_offset.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2014 --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> + +<!-- $Id: memory_mss_volt_avdd_offset.xml,v 1.2 2014/06/18 20:26:57 dcadiga Exp $ --> +<!-- For file ../../ipl/fapi/mss_volt_avdd_offset.C --> +<!-- // *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) --> +<!-- // *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) --> + + +<!-- Original Source for RC_MSS_VOLT_TOLERATED_VOLTAGE_VIOLATION memory_errors.xml --> + <hwpError> + <rc>RC_MSS_VOLT_AVDD_OFFSET_VALUE_ERROR</rc> + <description>One or more dynamic AVDD attributes is 0.</description> + <ffdc>AVDD_SLOPE_ACTIVE</ffdc> + <ffdc>AVDD_SLOPE_INACTIVE</ffdc> + <ffdc>AVDD_SLOPE_INTERCEPT</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +</hwpErrors> + diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vcs_offset.xml b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vcs_offset.xml new file mode 100644 index 000000000..6784a184c --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vcs_offset.xml @@ -0,0 +1,45 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vcs_offset.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2014 --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> + +<!-- $Id: memory_mss_volt_vcs_offset.xml,v 1.2 2014/06/18 20:27:01 dcadiga Exp $ --> +<!-- For file ../../ipl/fapi/mss_volt_vcs_offset.C --> +<!-- // *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) --> +<!-- // *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) --> + + +<!-- Original Source for RC_MSS_VOLT_TOLERATED_VOLTAGE_VIOLATION memory_errors.xml --> + <hwpError> + <rc>RC_MSS_VOLT_VCS_OFFSET_VALUE_ERROR</rc> + <ffdc>VCS_SLOPE_ACTIVE</ffdc> + <ffdc>VCS_SLOPE_INACTIVE</ffdc> + <ffdc>VCS_SLOPE_INTERCEPT</ffdc> + <description>One or more dynamic VCS attributes is 0.</description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +</hwpErrors> + diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vdd_offset.xml b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vdd_offset.xml new file mode 100644 index 000000000..d82b37123 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vdd_offset.xml @@ -0,0 +1,45 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vdd_offset.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2014 --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> + +<!-- $Id: memory_mss_volt_vdd_offset.xml,v 1.2 2014/06/18 20:27:05 dcadiga Exp $ --> +<!-- For file ../../ipl/fapi/mss_volt_vdd_offset.C --> +<!-- // *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) --> +<!-- // *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) --> + + +<!-- Original Source for RC_MSS_VOLT_TOLERATED_VOLTAGE_VIOLATION memory_errors.xml --> + <hwpError> + <rc>RC_MSS_VOLT_VDD_OFFSET_VALUE_ERROR</rc> + <ffdc>VDD_SLOPE_ACTIVE</ffdc> + <ffdc>VDD_SLOPE_INACTIVE</ffdc> + <ffdc>VDD_SLOPE_INTERCEPT</ffdc> + <description>One or more dynamic VDD attributes is 0.</description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +</hwpErrors> + diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vddr_offset.xml b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vddr_offset.xml new file mode 100644 index 000000000..d72fa1db0 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vddr_offset.xml @@ -0,0 +1,70 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vddr_offset.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2014 --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> + +<!-- $Id: memory_mss_volt_vddr_offset.xml,v 1.2 2014/06/18 20:27:07 dcadiga Exp $ --> +<!-- For file ../../ipl/fapi/mss_volt_vddr_offset.C --> +<!-- // *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) --> +<!-- // *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) --> + + +<!-- Original Source for RC_MSS_VOLT_TOLERATED_VOLTAGE_VIOLATION memory_errors.xml --> + <hwpError> + <rc>RC_MSS_VOLT_VDDR_OFFSET_DRAM_GEN_MISCOMPARE</rc> + <description>One or more DIMMs has a different generation of DRAM technology level.</description> + <ffdc>DRAM_GEN_MISCOMPARE</ffdc> + <ffdc>DRAM_GEN_START</ffdc> + <ffdc>CEN_MBA_NUM</ffdc> + <ffdc>CEN_TARGET_NUM</ffdc> + <!-- Deconfigure DIMM or Centaur --> + <deconfigure> + <target>CHIP_TARGET</target> + </deconfigure> + </hwpError> + + <hwpError> + <rc>RC_MSS_VOLT_VDDR_OFFSET_VPD_VALUE_ERROR</rc> + <description>one or more VPD voltage attributes is 0.</description> + <ffdc>VPD_MASTER_POWER_SLOPE</ffdc> + <ffdc>VPD_MASTER_POWER_INTERCEPT</ffdc> + <ffdc>CEN_TARGET_NUM</ffdc> + <deconfigure> + <target>CHIP_TARGET</target> + </deconfigure> + </hwpError> + + <hwpError> + <rc>RC_MSS_VOLT_VDDR_OFFSET_VALUE_ERROR</rc> + <ffdc>VDDR_SLOPE_ACTIVE</ffdc> + <ffdc>VDDR_SLOPE_INACTIVE</ffdc> + <ffdc>VDDR_SLOPE_INTERCEPT</ffdc> + <description>One or more dynamic VDDR attributes is 0.</description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + + +</hwpErrors> + diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vpp_offset.xml b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vpp_offset.xml new file mode 100644 index 000000000..68356fc6e --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vpp_offset.xml @@ -0,0 +1,57 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/mc_config/mss_volt/memory_mss_volt_vpp_offset.xml $ --> +<!-- --> +<!-- OpenPOWER HostBoot Project --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2014 --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<hwpErrors> + +<!-- $Id: memory_mss_volt_vpp_offset.xml,v 1.2 2014/06/18 20:27:08 dcadiga Exp $ --> +<!-- For file ../../ipl/fapi/mss_volt_vpp_offset.C --> +<!-- // *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) --> +<!-- // *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) --> + + +<!-- Original Source for RC_MSS_VOLT_TOLERATED_VOLTAGE_VIOLATION memory_errors.xml --> + <hwpError> + <rc>RC_MSS_VOLT_VPP_OFFSET_DRAM_GEN_MISCOMPARE</rc> + <description>One or more DIMMs has a different generation of DRAM technology level.</description> + <ffdc>DRAM_GEN_MISCOMPARE</ffdc> + <ffdc>DRAM_GEN_START</ffdc> + <ffdc>CEN_MBA_NUM</ffdc> + <ffdc>CEN_TARGET_NUM</ffdc> + <!-- Deconfigure DIMM or Centaur --> + <deconfigure> + <target>CHIP_TARGET</target> + </deconfigure> + </hwpError> + + <hwpError> + <rc>RC_MSS_VOLT_VPP_OFFSET_VALUE_ERROR</rc> + <description>One or more dynamic VPP attributes is 0.</description> + <ffdc>VPP_SLOPE</ffdc> + <ffdc>VPP_INTERCEPT</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + +</hwpErrors> + diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_count_active_centaurs.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_count_active_centaurs.C new file mode 100644 index 000000000..6da734b8c --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_count_active_centaurs.C @@ -0,0 +1,93 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_count_active_centaurs.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_count_active_centaurs.C,v 1.1 2014/06/16 16:06:23 dcadiga Exp $ +/* File mss_volt_vpp_offset.C created by Stephen Glancy on Tue 20 May 2014. */ + +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2007 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vpp_offset.C +// *! DESCRIPTION : Tools for centaur procedures +// *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) +// *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) +// #! ADDITIONAL COMMENTS : +// +// General purpose funcs + +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.1 | sglancy | 05/20/14 | File created + +// This procedure takes a vector of Centaurs and finds the total number of active and inactive centaurs + + +//---------------------------------------------------------------------- +// Includes - FAPI +//---------------------------------------------------------------------- +#include <fapi.H> +#include <mss_count_active_centaurs.H> + +//---------------------------------------------------------------------- +// Constants +//---------------------------------------------------------------------- + + +fapi::ReturnCode mss_count_active_centaurs(std::vector<fapi::Target> & i_targets, uint32_t & var_num_active_centaur, uint32_t &var_num_inactive_centaur) +{ + fapi::ReturnCode l_rc; + //sets up the variables + uint8_t is_functional = 0; + var_num_active_centaur = 0; + var_num_inactive_centaur = 0; + + //loops through and generates the counts + for(uint32_t i=0;i<i_targets.size();i++) { + //gets the functional attribute to check for an active centaur + l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL,&i_targets[i],is_functional); + + //found an error + if(l_rc) return l_rc; + + //found an active centaur + if(is_functional == fapi::ENUM_ATTR_FUNCTIONAL_FUNCTIONAL) { + var_num_active_centaur++; + } + //centaur must be inactive + else { + var_num_inactive_centaur++; + } + } + + //debug print + FAPI_INF("RETURNING ACTIVE: %d INACTIVE: %d\n",var_num_active_centaur,var_num_inactive_centaur); + + //return + return l_rc; +} diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt.C index f6f14b6a2..192c5068a 100644 --- a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt.C +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt.C @@ -20,7 +20,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_volt.C,v 1.13 2014/03/06 00:13:52 jdsloat Exp $ +// $Id: mss_volt.C,v 1.15 2014/06/19 18:44:00 jdsloat Exp $ /* File mss_volt.C created by JEFF SABROWSKI on Fri 21 Oct 2011. */ //------------------------------------------------------------------------------ @@ -54,6 +54,8 @@ // 1.11 | bellows | 07/16/12 | added in Id tag // 1.11 | jdsloat | 10/18/12 | Added check for violation of tolerant voltages of non-functional dimms. // 1.12 | jdsloat | 03/05/14 | RAS review Edits -- Error HW callouts +// 1.13 | jdsloat | 06/05/14 | Added ATTR_MSS_VOLT_VPP being set, as well as ATTR_MSS_VOLT_OVERRIDE +// 1.14 | jdsloat | 06/19/14 | Added error checking associated ATTR_MSS_VOLT_OVERRIDE // This procedure takes a vector of Centaurs behind a voltage domain, // reads in supported DIMM voltages from SPD and determines optimal @@ -73,6 +75,8 @@ const uint32_t MAX_TOLERATED_VOLT = 1500; const uint32_t MAX_TOLERATED_DDR3_VOLT = 1500; const uint32_t MAX_TOLERATED_DDR4_VOLT = 1200; +const uint32_t DDR3_VPP_VOLT = 0000; +const uint32_t DDR4_VPP_VOLT = 2500; fapi::ReturnCode mss_volt(std::vector<fapi::Target> & i_targets_memb) { @@ -84,8 +88,11 @@ fapi::ReturnCode mss_volt(std::vector<fapi::Target> & i_targets_memb) uint8_t l_spd_volts_all_dimms=0x06; //start assuming all voltages supported uint8_t l_dram_ddr3_found_flag=0; uint8_t l_dram_ddr4_found_flag=0; + uint8_t l_volt_override = 0x00; + uint8_t l_volt_override_domain = 0x00; uint32_t l_selected_dram_voltage=0; //this gets written into all centaurs when done. + uint32_t l_selected_dram_voltage_vpp=0; uint32_t l_tolerated_dram_voltage = MAX_TOLERATED_VOLT; //initially set to the max tolerated voltage do @@ -97,6 +104,29 @@ fapi::ReturnCode mss_volt(std::vector<fapi::Target> & i_targets_memb) // Get associated MBA's on this centaur l_rc=fapiGetChildChiplets(i_targets_memb[i], fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets); if (l_rc) break; + + + l_rc = FAPI_ATTR_GET(ATTR_MSS_VOLT_OVERRIDE, &i_targets_memb[i], l_volt_override); + if (l_rc) break; + + // Note if there is an overrride being applied on the domain + if ( (l_volt_override != fapi::ENUM_ATTR_MSS_VOLT_OVERRIDE_NONE) && (l_volt_override_domain == fapi::ENUM_ATTR_MSS_VOLT_OVERRIDE_NONE) ) + { + l_volt_override_domain = l_volt_override; + } + + // Error if our overides are not the same across the domain + if (l_volt_override_domain != l_volt_override) + { + // this just needs to callout the mismatching memb. + const uint8_t &OVERRIDE_TYPE = l_volt_override; + const uint8_t &OVERRIDE_DOMAIN_TYPE = l_volt_override_domain; + const fapi::Target &MEMB_TARGET = i_targets_memb[i]; + FAPI_ERR("Mismatch volt override request. Domain: 0x%x Current Target Requests: 0x%x", l_volt_override_domain, l_volt_override); + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_OVERIDE_MIXING); + fapiLogError(l_rc); + } + // Loop through the 2 MBA's for (uint32_t j=0; j < l_mbaChiplets.size(); j++) { @@ -104,6 +134,7 @@ fapi::ReturnCode mss_volt(std::vector<fapi::Target> & i_targets_memb) // Get a vector of DIMM targets l_rc = fapiGetAssociatedDimms(l_mbaChiplets[j], l_dimm_targets, fapi::TARGET_STATE_PRESENT); if (l_rc) break; + for (uint32_t k=0; k < l_dimm_targets.size(); k++) { l_rc = FAPI_ATTR_GET(ATTR_SPD_DRAM_DEVICE_TYPE, &l_dimm_targets[k], l_spd_dramtype); @@ -212,17 +243,44 @@ fapi::ReturnCode mss_volt(std::vector<fapi::Target> & i_targets_memb) break; } - if (l_dram_ddr3_found_flag && ((l_spd_volts_all_dimms & fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_OP1_35) == fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_OP1_35)) + + if (l_volt_override != fapi::ENUM_ATTR_MSS_VOLT_OVERRIDE_NONE) + { + if (l_volt_override == fapi::ENUM_ATTR_MSS_VOLT_OVERRIDE_VOLT_135) + { + l_tolerated_dram_voltage = 1350; + FAPI_INF( "mss_volt_overide being applied. MSS_VOLT_OVERRIDE: 1.35V"); + FAPI_INF( "NOTE: Still checking for violations of tolerated voltage. If DIMMs cannot tolerate, the override will not be applied."); + } + if (l_volt_override == fapi::ENUM_ATTR_MSS_VOLT_OVERRIDE_VOLT_120) + { + l_tolerated_dram_voltage = 1200; + FAPI_INF( "mss_volt_overide being applied. MSS_VOLT_OVERRIDE: 1.20V"); + FAPI_INF( "NOTE: Still checking for violations of tolerated voltage. If DIMMs cannot tolerate, the override will not be applied."); + } + else + { + const uint8_t &OVERRIDE_TYPE = l_volt_override; + FAPI_ERR("Unknown volt override request. Override Request: 0x%x", l_volt_override); + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_OVERIDE_UKNOWN); + fapiLogError(l_rc); + } + + } + else if (l_dram_ddr3_found_flag && ((l_spd_volts_all_dimms & fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_OP1_35) == fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_OP1_35)) { l_selected_dram_voltage=1350; + l_selected_dram_voltage_vpp = DDR3_VPP_VOLT; } else if (l_dram_ddr4_found_flag && ((l_spd_volts_all_dimms & fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_OP1_2X) == fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_OP1_2X)) { l_selected_dram_voltage=1200; + l_selected_dram_voltage_vpp = DDR4_VPP_VOLT; } else if ((l_spd_volts_all_dimms & fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_NOTOP1_5) != fapi::ENUM_ATTR_SPD_MODULE_NOMINAL_VOLTAGE_NOTOP1_5) { l_selected_dram_voltage=1500; + l_selected_dram_voltage_vpp = DDR3_VPP_VOLT; } else { @@ -274,6 +332,8 @@ fapi::ReturnCode mss_volt(std::vector<fapi::Target> & i_targets_memb) break; } + + // Must check to see if we violate Tolerent voltages of Non-functional Dimms // If so we must error/deconfigure on the dimm level primarily then centaur level. // Iterate through the list of centaurs @@ -367,6 +427,11 @@ fapi::ReturnCode mss_volt(std::vector<fapi::Target> & i_targets_memb) l_rc = FAPI_ATTR_SET(ATTR_MSS_VOLT, &i_targets_memb[i], l_selected_dram_voltage); FAPI_INF( "mss_volt calculation complete. MSS_VOLT: %d", l_selected_dram_voltage); if (l_rc) break; + + l_rc = FAPI_ATTR_SET(ATTR_MSS_VOLT_VPP, &i_targets_memb[i], l_selected_dram_voltage_vpp); + FAPI_INF( "mss_volt calculation complete. MSS_VOLT_VPP: %d", l_selected_dram_voltage_vpp); + if (l_rc) break; + } }while(0); return l_rc; diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.C new file mode 100644 index 000000000..c403ea37b --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.C @@ -0,0 +1,127 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_avdd_offset.C,v 1.6 2014/06/18 20:34:16 dcadiga Exp $ +/* File mss_volt_avdd_offset.C created by Stephen Glancy on Tue 20 May 2014. */ + +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2007 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_avdd_offset.C +// *! DESCRIPTION : Tools for centaur procedures +// *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) +// *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) +// #! ADDITIONAL COMMENTS : +// +// General purpose funcs + +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.6 | sglancy | 06/18/14 | Updated errors +// 1.5 | sglancy | 06/09/14 | Updated debug statements +// 1.4 | sglancy | 06/04/14 | Updated to include output attribute +// 1.3 | sglancy | 05/30/14 | Formatted code +// 1.2 | sglancy | 05/29/14 | Fixed attributes units and equations +// 1.1 | sglancy | 05/20/14 | File created + +// This procedure takes a vector of Centaurs behind the avdd voltage domain, +// reads in supported DIMM voltages from SPD and determines optimal +// voltage bin for the DIMM voltage domain. +// supported voltage bins: 1.50 V + + +//---------------------------------------------------------------------- +// Includes - FAPI +//---------------------------------------------------------------------- +#include <fapi.H> +#include <mss_volt_avdd_offset.H> +#include <mss_count_active_centaurs.H> + +//---------------------------------------------------------------------- +// Constants +//---------------------------------------------------------------------- + + +fapi::ReturnCode mss_volt_avdd_offset(std::vector<fapi::Target> & i_targets) +{ + //declares variables + fapi::ReturnCode l_rc; + uint32_t var_num_active_centaur = 0; + uint32_t var_num_inactive_centaur = 0; + uint32_t slope_active, slope_inactive, intercept; + uint8_t enable; + + //voltage should not be updated if the disable is set + l_rc = FAPI_ATTR_GET(ATTR_MSS_AVDD_OFFSET_DISABLE,NULL,enable); + if(l_rc) return l_rc; + if(enable == fapi::ENUM_ATTR_MSS_AVDD_OFFSET_DISABLE_DISABLE) { + FAPI_INF("ATTR_MSS_AVDD_OFFSET_DISABLE is set to be disabled. Exiting....."); + return l_rc; + } + + //computes avdd value + //gets the necessary attributes and checks for errors + l_rc = FAPI_ATTR_GET(ATTR_MSS_AVDD_SLOPE_ACTIVE,NULL,slope_active); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_AVDD_SLOPE_INACTIVE,NULL,slope_inactive); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_AVDD_SLOPE_INTERCEPT,NULL,intercept); + if(l_rc) return l_rc; + + //checks to make sure that none of the values are zeros. If any of the values are 0's then 0 * any other value = 0 + if((slope_active * slope_inactive * intercept) == 0) { + const uint32_t &AVDD_SLOPE_ACTIVE = slope_active; + const uint32_t &AVDD_SLOPE_INACTIVE = slope_inactive; + const uint32_t &AVDD_SLOPE_INTERCEPT = intercept; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_AVDD_OFFSET_VALUE_ERROR); + FAPI_ERR("One or more dynamic AVDD attributes is 0.\nExiting...."); + return l_rc; + } + + //debug print + FAPI_INF("slope_active: %d uV/centaur slope_inactive: %d uV/centaur slope_intercept: %d mV",slope_active,slope_inactive,intercept); + + //generates the count of active and inactive centaurs + l_rc = mss_count_active_centaurs(i_targets, var_num_active_centaur, var_num_inactive_centaur); + if(l_rc) return l_rc; + FAPI_INF("var_active: %d centaurs var_inactive: %d centaurs",var_num_active_centaur,var_num_inactive_centaur); + + //computes and sets the appropriate attribute + uint32_t param_avdd_voltage_uv = (slope_active * var_num_active_centaur) + (slope_inactive * var_num_inactive_centaur) + 1000 * intercept; + //rounds and converts the voltage offset into mV + uint32_t param_avdd_voltage_mv = (500 + param_avdd_voltage_uv) / 1000; + FAPI_INF("ATTR_MSS_AVDD_OFFSET: %d mV",param_avdd_voltage_mv); + + //sets the output attributes + for(uint32_t i = 0; i< i_targets.size();i++) { + l_rc = FAPI_ATTR_SET(ATTR_MSS_AVDD_OFFSET,&i_targets[i],param_avdd_voltage_mv); + if(l_rc) return l_rc; + }//end for + return l_rc; +} diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.H b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.H new file mode 100644 index 000000000..a105baf89 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.H @@ -0,0 +1,71 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_avdd_offset.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_avdd_offset.H,v 1.4 2014/06/18 20:34:28 dcadiga Exp $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_avdd_offset.H +// *! DESCRIPTION : see additional comments below +// *! OWNER NAME : Stephen Glancy Email: sglancy@us.ibm.com +// *! BACKUP NAME : Jacob Sloat Email: jdsloat@us.ibm.com +// *! ADDITIONAL COMMENTS : +// +// Header file for mss_volt_avdd_offset. +// +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.4 | sglancy | 06/16/14 | Updated to include output attribute +// 1.3 | sglancy | 06/04/14 | Updated to include output attribute +// 1.2 | sglancy | 05/30/14 | changed function to return a value in uV +// 1.1 | sglancy | 05/20/14 | initial drop +#ifndef MSS_VOLT_AVDD_OFFSET_H_ +#define MSS_VOLT_AVDD_OFFSET_H_ + +#include <fapi.H> + +typedef fapi::ReturnCode (*mss_volt_avdd_offset_FP_t)(std::vector<fapi::Target> & i_targets); + +extern "C" +{ + +/** + * @brief mss_volt_avdd_offset procedure. Determines operating avdd voltage for dimms behind a avdd voltage domain + * + * @param[in] std::vector<fapi::Target> l_targets Reference to vector of Centaur Targets in a particular avdd power domain + * + * @return ReturnCode + */ + + fapi::ReturnCode mss_volt_avdd_offset(std::vector<fapi::Target> & i_targets + ); + +} // extern "C" + +#endif // MSS_VOLT_AVDD_OFFSET_H_ diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.C new file mode 100644 index 000000000..8b8cd2b44 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.C @@ -0,0 +1,149 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vcs_offset.C,v 1.7 2014/06/19 16:06:11 dcadiga Exp $ +/* File mss_volt_vcs_offset.C created by Stephen Glancy on Tue 20 May 2014. */ + +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2007 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vcs_offset.C +// *! DESCRIPTION : Tools for centaur procedures +// *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) +// *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) +// #! ADDITIONAL COMMENTS : +// +// General purpose funcs + +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.7 | sglancy | 06/19/14 | Includes update to force the VCS to be 100 mV higher than the VDD +// 1.6 | sglancy | 06/18/14 | Updated errors +// 1.5 | sglancy | 06/09/14 | Updated debug statements +// 1.4 | sglancy | 06/04/14 | Updated to include output attribute +// 1.3 | sglancy | 05/30/14 | Formatted code +// 1.2 | sglancy | 05/29/14 | Fixed attributes units and equations +// 1.1 | sglancy | 05/20/14 | File created + +// This procedure takes a vector of Centaurs behind the vcs voltage domain, +// reads in supported DIMM voltages from SPD and determines optimal +// voltage bin for the DIMM voltage domain. +// supported voltage bins: 1.104 V + + +//---------------------------------------------------------------------- +// Includes - FAPI +//---------------------------------------------------------------------- +#include <fapi.H> +#include <mss_volt_vcs_offset.H> +#include <mss_count_active_centaurs.H> + +//---------------------------------------------------------------------- +// Constants +//---------------------------------------------------------------------- + + +fapi::ReturnCode mss_volt_vcs_offset(std::vector<fapi::Target> & i_targets) +{ + //declares variables + fapi::ReturnCode l_rc; + uint32_t var_num_active_centaur = 0; + uint32_t var_num_inactive_centaur = 0; + uint32_t slope_active, slope_inactive, intercept; + uint8_t enable; + + //voltage should not be updated if the disable is set + l_rc = FAPI_ATTR_GET(ATTR_MSS_VCS_OFFSET_DISABLE,NULL,enable); + //error check + if(l_rc) return l_rc; + if(enable == fapi::ENUM_ATTR_MSS_VCS_OFFSET_DISABLE_DISABLE) { + FAPI_INF("ATTR_MSS_VCS_OFFSET_DISABLE is set to be disabled. Exiting....."); + return l_rc; + } + + //computes vcs value + //gets the necessary attributes and checks for errors + l_rc = FAPI_ATTR_GET(ATTR_MSS_VCS_SLOPE_ACTIVE,NULL,slope_active); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_VCS_SLOPE_INACTIVE,NULL,slope_inactive); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_VCS_SLOPE_INTERCEPT,NULL,intercept); + if(l_rc) return l_rc; + + //checks to make sure that none of the values are zeros. If any of the values are 0's then 0 * any other value = 0 + if((slope_active * slope_inactive * intercept) == 0) { + const uint32_t &VCS_SLOPE_ACTIVE = slope_active; + const uint32_t &VCS_SLOPE_INACTIVE = slope_inactive; + const uint32_t &VCS_SLOPE_INTERCEPT = intercept; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_VCS_OFFSET_VALUE_ERROR); + FAPI_ERR("One or more dynamic VCS attributes is 0.\nExiting...."); + return l_rc; + } + + //debug print + FAPI_INF("slope_active: %d uV/centaur slope_inactive: %d uV/centaur slope_intercept: %d mV\n",slope_active,slope_inactive,intercept); + + //generates the list of active and inactive centaurs + l_rc = mss_count_active_centaurs(i_targets, var_num_active_centaur, var_num_inactive_centaur); + if(l_rc) return l_rc; + FAPI_INF("var_active: %d centaurs var_inactive: %d centaurs\n",var_num_active_centaur,var_num_inactive_centaur); + + //computes and sets the appropriate attribute + uint32_t param_vcs_voltage_uv = (slope_active * var_num_active_centaur) + (slope_inactive * var_num_inactive_centaur) + 1000 * intercept; + //rounds and converts the voltage offset into mV + uint32_t param_vcs_voltage_mv = (500 + param_vcs_voltage_uv) / 1000; + FAPI_INF("Post calculation ATTR_MSS_VCS_OFFSET: %d mV",param_vcs_voltage_mv); + + //checks to see if VDD is disabled, if so, skip the required VCS increase check + l_rc = FAPI_ATTR_GET(ATTR_MSS_VDD_OFFSET_DISABLE,NULL,enable); + //error check + if(l_rc) return l_rc; + if(enable == fapi::ENUM_ATTR_MSS_VDD_OFFSET_DISABLE_ENABLE) { + FAPI_INF("ATTR_MSS_VDD_OFFSET_DISABLE is set to be enabled. Checking VCS levels"); + //adjusts the param_vcs_voltage_mv to be at least 100 mV higher than vcs + for(uint32_t i = 0; i< i_targets.size();i++) { + uint32_t param_vdd_voltage_mv = 0; + l_rc = FAPI_ATTR_GET(ATTR_MSS_VDD_OFFSET,&i_targets[i],param_vdd_voltage_mv); + if(l_rc) return l_rc; + //adjusts the voltage accordingly + if(param_vdd_voltage_mv + 100 > param_vcs_voltage_mv) { + param_vcs_voltage_mv = 100 + param_vdd_voltage_mv; + } + } + FAPI_INF("Post adjust ATTR_MSS_VCS_OFFSET: %d mV",param_vcs_voltage_mv); + } + + //sets the output attributes + for(uint32_t i = 0; i< i_targets.size();i++) { + l_rc = FAPI_ATTR_SET(ATTR_MSS_VCS_OFFSET,&i_targets[i],param_vcs_voltage_mv); + if(l_rc) return l_rc; + }//end for + + return l_rc; +} diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.H b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.H new file mode 100644 index 000000000..073e72ff2 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.H @@ -0,0 +1,70 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vcs_offset.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vcs_offset.H,v 1.4 2014/06/18 20:34:32 dcadiga Exp $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vcs_offset.H +// *! DESCRIPTION : see additional comments below +// *! OWNER NAME : Stephen Glancy Email: sglancy@us.ibm.com +// *! BACKUP NAME : Jacob Sloat Email: jdsloat@us.ibm.com +// *! ADDITIONAL COMMENTS : +// +// Header file for mss_volt_vcs_offset. +// +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.4 | sglancy | 06/16/14 | Updated to fix define to be VCS and some formatting fixes +// 1.3 | sglancy | 06/04/14 | Updated to include output attribute +// 1.2 | sglancy | 05/30/14 | changed function to return a value in uV +// 1.1 | sglancy | 05/20/14 | initial drop +#ifndef MSS_VOLT_VCS_OFFSET_H_ +#define MSS_VOLT_VCS_OFFSET_H_ + +#include <fapi.H> + +typedef fapi::ReturnCode (*mss_volt_vcs_offset_FP_t)(std::vector<fapi::Target> &); + +extern "C" +{ + +/** + * @brief mss_volt_vcs_offset procedure. Determines operating vcs voltage for dimms behind a vcs voltage domain + * + * @param[in] std::vector<fapi::Target> l_targets Reference to vector of Centaur Targets in a particular vcs power domain + * + * @return ReturnCode + */ + + fapi::ReturnCode mss_volt_vcs_offset(std::vector<fapi::Target> & i_targets); + +} // extern "C" + +#endif // MSS_VOLT_VCS_OFFSET_H_ diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.C new file mode 100644 index 000000000..780487c05 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.C @@ -0,0 +1,129 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vdd_offset.C,v 1.6 2014/06/18 20:34:34 dcadiga Exp $ +/* File mss_volt_vdd_offset.C created by Stephen Glancy on Tue 20 May 2014. */ + +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2007 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vdd_offset.C +// *! DESCRIPTION : Tools for centaur procedures +// *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) +// *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) +// #! ADDITIONAL COMMENTS : +// +// General purpose funcs + +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.6 | sglancy | 06/18/14 | Updated error flags +// 1.5 | sglancy | 06/09/14 | Updated debug statements +// 1.4 | sglancy | 06/04/14 | Updated to include output attribute +// 1.3 | sglancy | 05/30/14 | Formatted code +// 1.2 | sglancy | 05/29/14 | Fixed attributes units and equations +// 1.1 | sglancy | 05/20/14 | File created + +// This procedure takes a vector of Centaurs behind the vdd voltage domain, +// reads in supported DIMM voltages from SPD and determines optimal +// voltage bin for the DIMM voltage domain. +// supported voltage bins: 0.97V + + +//---------------------------------------------------------------------- +// Includes - FAPI +//---------------------------------------------------------------------- +#include <fapi.H> +#include <mss_volt_vdd_offset.H> +#include <mss_count_active_centaurs.H> + +//---------------------------------------------------------------------- +// Constants +//---------------------------------------------------------------------- + + +fapi::ReturnCode mss_volt_vdd_offset(std::vector<fapi::Target> & i_targets) +{ + //declares variables + fapi::ReturnCode l_rc; + uint32_t var_num_active_centaur = 0; + uint32_t var_num_inactive_centaur = 0; + uint32_t slope_active, slope_inactive, intercept; + uint8_t enable; + + //voltage should not be updated if the disable is set + l_rc = FAPI_ATTR_GET(ATTR_MSS_VDD_OFFSET_DISABLE,NULL,enable); + //error check + if(l_rc) return l_rc; + if(enable == fapi::ENUM_ATTR_MSS_VDD_OFFSET_DISABLE_DISABLE) { + FAPI_INF("ATTR_MSS_VCS_OFFSET_DISABLE is set to be disabled. Exiting....."); + return l_rc; + } + + //computes vdd value + //gets the necessary attributes and checks for errors + l_rc = FAPI_ATTR_GET(ATTR_MSS_VDD_SLOPE_ACTIVE,NULL,slope_active); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_VDD_SLOPE_INACTIVE,NULL,slope_inactive); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_VDD_SLOPE_INTERCEPT,NULL,intercept); + if(l_rc) return l_rc; + + //checks to make sure that none of the values are zeros. If any of the values are 0's then 0 * any other value = 0 + if((slope_active * slope_inactive * intercept) == 0) { + const uint32_t &VDD_SLOPE_ACTIVE = slope_active; + const uint32_t &VDD_SLOPE_INACTIVE = slope_inactive; + const uint32_t &VDD_SLOPE_INTERCEPT = intercept; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_VDD_OFFSET_VALUE_ERROR); + FAPI_ERR("One or more dynamic VDD attributes is 0.\nExiting...."); + return l_rc; + } + + //debug print + FAPI_INF("slope_active: %d uV/centaur slope_inactive: %d uV/centaur slope_intercept: %d mV\n",slope_active,slope_inactive,intercept); + + //generates the list of active and inactive centaurs + l_rc = mss_count_active_centaurs(i_targets, var_num_active_centaur, var_num_inactive_centaur); + if(l_rc) return l_rc; + FAPI_INF("var_active: %d centaurs var_inactive: %d centaurs\n",var_num_active_centaur,var_num_inactive_centaur); + + //computes and sets the appropriate attribute + uint32_t param_vdd_voltage_uv = (slope_active * var_num_active_centaur) + (slope_inactive * var_num_inactive_centaur) + 1000 * intercept; + //rounds and converts the voltage offset into mV + uint32_t param_vdd_voltage_mv = (500 + param_vdd_voltage_uv) / 1000; + FAPI_INF("ATTR_MSS_VDD_OFFSET: %d mV",param_vdd_voltage_mv); + + //sets the output attributes + for(uint32_t i = 0; i< i_targets.size();i++) { + l_rc = FAPI_ATTR_SET(ATTR_MSS_VDD_OFFSET,&i_targets[i],param_vdd_voltage_mv); + if(l_rc) return l_rc; + }//end for + + return l_rc; +} diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.H b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.H new file mode 100644 index 000000000..59b6ea1fb --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.H @@ -0,0 +1,70 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vdd_offset.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vdd_offset.H,v 1.4 2014/06/18 20:34:36 dcadiga Exp $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vdd_offset.H +// *! DESCRIPTION : see additional comments below +// *! OWNER NAME : Stephen Glancy Email: sglancy@us.ibm.com +// *! BACKUP NAME : Jacob Sloat Email: jdsloat@us.ibm.com +// *! ADDITIONAL COMMENTS : +// +// Header file for mss_volt_vdd_offset. +// +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.4 | sglancy | 06/16/14 | Updated to fix some formatting issues +// 1.3 | sglancy | 06/04/14 | Updated to include output attribute +// 1.2 | sglancy | 05/30/14 | changed function to return a value in uV +// 1.1 | sglancy | 05/20/14 | initial drop +#ifndef MSS_VOLT_VDD_OFFSET_H_ +#define MSS_VOLT_VDD_OFFSET_H_ + +#include <fapi.H> + +typedef fapi::ReturnCode (*mss_volt_vdd_offset_FP_t)(std::vector<fapi::Target> &); + +extern "C" +{ + +/** + * @brief mss_volt_vdd_offset procedure. Determines operating vdd voltage for dimms behind a vdd voltage domain + * + * @param[in] std::vector<fapi::Target> l_targets Reference to vector of Centaur Targets in a particular vdd power domain + * + * @return ReturnCode + */ + + fapi::ReturnCode mss_volt_vdd_offset(std::vector<fapi::Target> & i_targets); + +} // extern "C" + +#endif // MSS_VOLT_VDD_OFFSET_H_ diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C new file mode 100644 index 000000000..607a4671d --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C @@ -0,0 +1,243 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vddr_offset.C,v 1.6 2014/06/18 20:34:37 dcadiga Exp $ +/* File mss_volt_vddr_offset.C created by Stephen Glancy on Tue 20 May 2014. */ + +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2007 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vddr_offset.C +// *! DESCRIPTION : Tools for centaur procedures +// *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) +// *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) +// #! ADDITIONAL COMMENTS : +// +// General purpose funcs + +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.6 | sglancy | 06/18/14 | Updated to add more debug information into error +// 1.5 | sglancy | 06/09/14 | Updated to change output attribute name and update debug statements +// 1.4 | sglancy | 06/04/14 | Updated to include output attribute +// 1.3 | sglancy | 05/30/14 | Formatted code +// 1.2 | sglancy | 05/29/14 | Fixed attributes units and equations +// 1.1 | sglancy | 05/20/14 | File created + +// This procedure takes a vector of Centaurs behind the vddr voltage domain, +// reads in supported DIMM voltages from SPD and determines optimal +// voltage bin for the DIMM voltage domain. +// supported voltage bins: DDR3 1.35V DDR4 1.20V + + +//---------------------------------------------------------------------- +// Includes - FAPI +//---------------------------------------------------------------------- +#include <fapi.H> +#include <mss_volt_vddr_offset.H> +#include <mss_count_active_centaurs.H> + +//---------------------------------------------------------------------- +// Constants +//---------------------------------------------------------------------- + + +fapi::ReturnCode mss_volt_vddr_offset(std::vector<fapi::Target> & i_targets) +{ + + //declares variables + fapi::ReturnCode l_rc; + uint32_t vpd_master_power_slope, vpd_master_power_intercept, volt_util_active, volt_util_inactive, volt_slope, volt_intercept; + uint32_t var_power_on_vddr = 0; + uint32_t data_bus_util; + uint32_t num_logical_dimms; + uint8_t dram_gen, cur_dram_gen; + uint8_t enable, is_functional; + uint8_t percent_uplift; + uint8_t rank_config[2][2]; + std::vector<fapi::Target> l_mbaChiplets; + + //gets the attributes and computes var_power_on based upon whether the DRAM type is DDR3 or DDR4 + l_rc=fapiGetChildChiplets(i_targets[0], fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN,&l_mbaChiplets[0],dram_gen); + if(l_rc) return l_rc; + + //checks to make sure that all of the DRAM generation attributes are the same, if not error out + for(uint32_t i = 0; i < i_targets.size();i++) { + //loops through all MBA chiplets to compare the DRAM technology generation attribute + l_mbaChiplets.clear(); + l_rc=fapiGetChildChiplets(i_targets[i], fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets); + for(uint32_t j=0;j<l_mbaChiplets.size();j++) { + //gets the attributes and computes var_power_on based upon whether the DRAM type is DDR3 or DDR4 + l_rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN,&l_mbaChiplets[j],cur_dram_gen); + if(l_rc) return l_rc; + //values are not equal -> set the fapi RC and exit out + if(cur_dram_gen != dram_gen){ + // this just needs to be deconfiged at the dimm level + const fapi::Target & CHIP_TARGET = i_targets[i]; + const uint8_t &DRAM_GEN_MISCOMPARE = cur_dram_gen; + const uint8_t &DRAM_GEN_START = dram_gen; + const uint32_t &CEN_MBA_NUM = j; + const uint32_t &CEN_TARGET_NUM = i; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_VDDR_OFFSET_DRAM_GEN_MISCOMPARE); + FAPI_ERR("Not all DRAM technology generations are the same.\nExiting...."); + if(l_rc) return l_rc; + }//end if + }//end for + }//end for + + //voltage should not be updated if the disable is set + l_rc = FAPI_ATTR_GET(ATTR_MSS_VDDR_OFFSET_DISABLE,NULL,enable); + //error check + if(l_rc) return l_rc; + if(enable == fapi::ENUM_ATTR_MSS_VDDR_OFFSET_DISABLE_DISABLE){ + FAPI_INF("ATTR_MSS_VDDR_OFFSET_DISABLE is set to be disabled. Exiting....., %d",enable); + return l_rc; + } + + //gets the attributes and computes var_power_on based upon whether the DRAM type is DDR3 or DDR4 + if(dram_gen == fapi::ENUM_ATTR_EFF_DRAM_GEN_DDR3) { + l_rc = FAPI_ATTR_GET(ATTR_MSS_DDR3_VDDR_SLOPE,NULL,volt_slope); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_DDR3_VDDR_INTERCEPT,NULL,volt_intercept); + if(l_rc) return l_rc; + } + //ddr4 + else { + l_rc = FAPI_ATTR_GET(ATTR_MSS_DDR4_VDDR_SLOPE,NULL,volt_slope); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_DDR4_VDDR_INTERCEPT,NULL,volt_intercept); + if(l_rc) return l_rc; + } + + //computes the active an inactive attribute values + l_rc = FAPI_ATTR_GET(ATTR_MRW_MAX_DRAM_DATABUS_UTIL,NULL,data_bus_util); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT,NULL,percent_uplift); + if(l_rc) return l_rc; + volt_util_active = data_bus_util; + volt_util_inactive = 0; + + //checks to make sure that none of the values that were read or computed were set to zeros. If any of the values are 0's then 0 * any other value = 0 + if((volt_util_active * volt_slope * volt_intercept) == 0) { + const uint32_t &VDDR_SLOPE_ACTIVE = volt_util_active; + const uint32_t &VDDR_SLOPE_INACTIVE = volt_slope; + const uint32_t &VDDR_SLOPE_INTERCEPT = volt_intercept; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_VDDR_OFFSET_VALUE_ERROR); + FAPI_ERR("One or more dynamic VDD attributes is 0.\nExiting...."); + return l_rc; + } + + //debug print + FAPI_INF("data_bus_util %d per 10k volt_util_active: %d per 10k volt_util_inactive: %d per 10k",data_bus_util,volt_util_active,volt_util_inactive); + + //computes the preliminary VDDR value + for(uint32_t i=0;i<i_targets.size();i++) { + //gets the power slope values and does error checks + l_rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_SLOPE,&i_targets[i],vpd_master_power_slope); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_CDIMM_VPD_MASTER_POWER_INTERCEPT,&i_targets[i],vpd_master_power_intercept); + if(l_rc) return l_rc; + + //removes leading bits from the VPD MASTER POWER attributes, leaving only the values needed for the power calculations + vpd_master_power_slope &= 0x1FFF; + vpd_master_power_intercept &= 0x1FFF; + + //checks to make sure that the attribute values are non-zero + if((vpd_master_power_slope * vpd_master_power_intercept) == 0 ) { + const fapi::Target & CHIP_TARGET = i_targets[i]; + const uint32_t &VPD_MASTER_POWER_SLOPE = vpd_master_power_slope; + const uint32_t &VPD_MASTER_POWER_INTERCEPT = vpd_master_power_intercept; + const uint32_t &CEN_TARGET_NUM = i; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_VDDR_OFFSET_VPD_VALUE_ERROR); + FAPI_ERR("One or more VPD Power slope attributes is 0.\nExiting...."); + return l_rc; + } + + //gets the functional attribute to check for an active centaur + l_rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL,&i_targets[i],is_functional); + //found an error + if(l_rc) return l_rc; + + //loops through all MBA chiplets to compare the compute the total number of logical dimms on a dimm + l_mbaChiplets.clear(); + l_rc=fapiGetChildChiplets(i_targets[i], fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets); + num_logical_dimms = 0; + for(uint32_t mba=0;mba<l_mbaChiplets.size();mba++) { + //gets the number of declared ranks + l_rc = FAPI_ATTR_GET(ATTR_EFF_DIMM_RANKS_CONFIGED,&l_mbaChiplets[mba],rank_config); + if(l_rc) return l_rc; + for(uint32_t port=0;port<2;port++) { + for(uint32_t dimm=0;dimm<2;dimm++) { + if(rank_config[port][dimm]) num_logical_dimms++; + } + }//end for + }//end for + + //found an active centaur + //multiply by total number of active logical dimms + if(is_functional == fapi::ENUM_ATTR_FUNCTIONAL_FUNCTIONAL) { + var_power_on_vddr += (vpd_master_power_slope*volt_util_active/10000+vpd_master_power_intercept)*num_logical_dimms; + FAPI_INF("var_power_on_vddr: %d cW vpd_master_power_slope: %d cW volt_util_active: %d per 10k vpd_master_power_intercept %d cW",var_power_on_vddr,vpd_master_power_slope,volt_util_active,vpd_master_power_intercept); + } + //centaur must be inactive + else { + var_power_on_vddr += (vpd_master_power_slope*volt_util_inactive/10000+vpd_master_power_intercept)*num_logical_dimms; + FAPI_INF("var_power_on_vddr: %d cW vpd_master_power_slope: %d cW volt_util_inactive: %d per 10k vpd_master_power_intercept %d cW",var_power_on_vddr,vpd_master_power_slope,volt_util_inactive,vpd_master_power_intercept); + } + }//end for + + //debug print + FAPI_INF("var_power_on_vddr: %d cW percent_uplift: %d %%",var_power_on_vddr,percent_uplift); + //does computes the uplift + var_power_on_vddr = ((100 + percent_uplift) * var_power_on_vddr) / 100; + + //debug print + FAPI_INF("var_power_on_vddr: %d cW volt_slope: %d uV/W volt_intercept: %d mV",var_power_on_vddr,volt_slope,volt_intercept); + + //computes and converts the voltage offset into mV + uint32_t param_vddr_voltage_mv = (500 + var_power_on_vddr*volt_slope/100) / 1000 + volt_intercept; + FAPI_INF("param_vddr_voltage_mv: %d mV",param_vddr_voltage_mv); + //prints a debug statement + if(dram_gen == fapi::ENUM_ATTR_EFF_DRAM_GEN_DDR3) { + FAPI_INF("ATTR_MSS_DDR3_VDDR_OFFSET: %d mV",param_vddr_voltage_mv); + } + else { + FAPI_INF("ATTR_MSS_DDR4_VDDR_OFFSET: %d mV",param_vddr_voltage_mv); + } + + //sets the output attributes + for(uint32_t i = 0; i< i_targets.size();i++) { + l_rc = FAPI_ATTR_SET(ATTR_MSS_VDDR_OFFSET,&i_targets[i],param_vddr_voltage_mv); + if(l_rc) return l_rc; + }//end for + + return l_rc; +} diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.H b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.H new file mode 100644 index 000000000..30e75a7bf --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.H @@ -0,0 +1,70 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vddr_offset.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vddr_offset.H,v 1.4 2014/06/18 20:34:39 dcadiga Exp $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vddr_offset.H +// *! DESCRIPTION : see additional comments below +// *! OWNER NAME : Stephen Glancy Email: sglancy@us.ibm.com +// *! BACKUP NAME : Jacob Sloat Email: jdsloat@us.ibm.com +// *! ADDITIONAL COMMENTS : +// +// Header file for mss_volt_vddr_offset. +// +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.4 | sglancy | 06/16/14 | Updated to include output attribute +// 1.3 | sglancy | 06/04/14 | Updated to include output attribute +// 1.2 | sglancy | 05/30/14 | changed function to return a value in uV +// 1.1 | sglancy | 05/20/14 | initial drop +#ifndef MSS_VOLT_VDDR_OFFSET_H_ +#define MSS_VOLT_VDDR_OFFSET_H_ + +#include <fapi.H> + +typedef fapi::ReturnCode (*mss_volt_vddr_offset_FP_t)(std::vector<fapi::Target> &); + +extern "C" +{ + +/** + * @brief mss_volt_vddr_offset procedure. Determines operating vddr voltage for dimms behind a vddr voltage domain + * + * @param[in] std::vector<fapi::Target> l_targets Reference to vector of Centaur Targets in a particular vddr power domain + * + * @return ReturnCode + */ + + fapi::ReturnCode mss_volt_vddr_offset(std::vector<fapi::Target> & i_targets); + +} // extern "C" + +#endif // MSS_VOLT_VDDR_OFFSET_H_ diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.C b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.C new file mode 100644 index 000000000..79c41c82c --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.C @@ -0,0 +1,209 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vpp_offset.C,v 1.6 2014/06/18 20:34:41 dcadiga Exp $ +/* File mss_volt_vpp_offset.C created by Stephen Glancy on Tue 20 May 2014. */ + +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2007 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vpp_offset.C +// *! DESCRIPTION : Tools for centaur procedures +// *! OWNER NAME : Stephen Glancy (sglancy@us.ibm.com) +// *! BACKUP NAME : Jacob Sloat (jdsloat@us.ibm.com) +// #! ADDITIONAL COMMENTS : +// +// General purpose funcs + +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.6 | sglancy | 06/18/14 | Deletes two unused variables and updated errors +// 1.5 | sglancy | 06/09/14 | Updated debug statements +// 1.4 | sglancy | 06/04/14 | Updated to include output attribute +// 1.3 | sglancy | 05/30/14 | Formatted code +// 1.2 | sglancy | 05/29/14 | Fixed attributes units and equations +// 1.1 | sglancy | 05/20/14 | File created + +// This procedure takes a vector of Centaurs behind the vpp voltage domain, +// reads in supported DIMM voltages from SPD and determines optimal +// voltage bin for the DIMM voltage domain. +// supported voltage bins: DDR3 0V DDR4 2.5V + + +//---------------------------------------------------------------------- +// Includes - FAPI +//---------------------------------------------------------------------- +#include <fapi.H> +#include <mss_volt_vpp_offset.H> +#include <mss_count_active_centaurs.H> + +//---------------------------------------------------------------------- +// Constants +//---------------------------------------------------------------------- + + +fapi::ReturnCode mss_volt_vpp_offset(std::vector<fapi::Target> & i_targets) +{ + //declares variables + fapi::ReturnCode l_rc; + uint32_t num_chips = 0; + uint32_t vpp_slope, vpp_intercept; + uint8_t dram_width, enable, dram_gen; + uint8_t cur_dram_gen; + uint8_t num_spares[2][2][4]; + uint8_t rank_config[2][2]; + std::vector<fapi::Target> l_mbaChiplets; + + //gets the attributes and computes var_power_on based upon whether the DRAM type is DDR3 or DDR4 + l_rc=fapiGetChildChiplets(i_targets[0], fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN,&l_mbaChiplets[0],dram_gen); + if(l_rc) return l_rc; + + //checks to make sure that all of the DRAM generation attributes are the same, if not error out + for(uint32_t i = 0; i < i_targets.size();i++) { + //loops through all MBA chiplets to compare the DRAM technology generation attribute + l_mbaChiplets.clear(); + l_rc=fapiGetChildChiplets(i_targets[i], fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets); + for(uint32_t j=0;j<l_mbaChiplets.size();j++) { + //gets the attributes and computes var_power_on based upon whether the DRAM type is DDR3 or DDR4 + l_rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_GEN,&l_mbaChiplets[j],cur_dram_gen); + if(l_rc) return l_rc; + //values are not equal -> set the fapi RC and exit out + if(cur_dram_gen != dram_gen){ + // this just needs to be deconfiged at the dimm level + const fapi::Target & CHIP_TARGET = i_targets[i]; + const uint8_t &DRAM_GEN_MISCOMPARE = cur_dram_gen; + const uint8_t &DRAM_GEN_START = dram_gen; + const uint32_t &CEN_MBA_NUM = j; + const uint32_t &CEN_TARGET_NUM = i; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_VPP_OFFSET_DRAM_GEN_MISCOMPARE); + FAPI_ERR("Not all DRAM technology generations are the same.\nExiting...."); + if(l_rc) return l_rc; + }//end if + }//end for + }//end for + + //checks to see if the DIMMs are DDR3 DIMMs if so, return 0 and exit + if(dram_gen == fapi::ENUM_ATTR_EFF_DRAM_GEN_DDR3) { + uint32_t param_vpp_voltage_mv = 0; + //debug output statement + FAPI_INF("ATTR_MSS_VPP_OFFSET: %d",param_vpp_voltage_mv); + //sets the output attributes + for(uint32_t i = 0; i< i_targets.size();i++) { + l_rc = FAPI_ATTR_SET(ATTR_MSS_VPP_OFFSET,&i_targets[i],param_vpp_voltage_mv); + if(l_rc) return l_rc; + } + return l_rc; + } + + //voltage should not be updated if the disable is set + l_rc = FAPI_ATTR_GET(ATTR_MSS_VPP_OFFSET_DISABLE,NULL,enable); + //error check + if(l_rc) return l_rc; + //add print statement for enable/disable check + + if(enable == fapi::ENUM_ATTR_MSS_VPP_OFFSET_DISABLE_DISABLE) return l_rc; + + //gets the slope and intercepts + l_rc = FAPI_ATTR_GET(ATTR_MSS_VPP_SLOPE,NULL,vpp_slope); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_MSS_VPP_SLOPE_INTERCEPT,NULL,vpp_intercept); + if(l_rc) return l_rc; + //checks to make sure that none of the values are zeros. If any of the values are 0's then 0 * any other value = 0 + if((vpp_slope * vpp_intercept) == 0) { + const uint32_t &VPP_SLOPE = vpp_slope; + const uint32_t &VPP_INTERCEPT = vpp_intercept; + FAPI_SET_HWP_ERROR(l_rc, RC_MSS_VOLT_VPP_OFFSET_VALUE_ERROR); + FAPI_ERR("One or more dynamic VPP attributes is 0.\nExiting...."); + return l_rc; + } + + + //continues computing VPP for DDR4 + //loops through all DIMMs + num_chips=0; + for(uint32_t i=0;i<i_targets.size();i++) { + //resets the number of ranks and spares + l_mbaChiplets.clear(); + l_rc=fapiGetChildChiplets(i_targets[i], fapi::TARGET_TYPE_MBA_CHIPLET, l_mbaChiplets); + //loops through the each MBA chiplet to get the number of ranks and the number of spares + for(uint32_t mba = 0;mba<l_mbaChiplets.size();mba++) { + //gets if the centaur is a x4 or a x8 + l_rc = FAPI_ATTR_GET(ATTR_EFF_DRAM_WIDTH,&l_mbaChiplets[mba],dram_width); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_EFF_NUM_RANKS_PER_DIMM,&l_mbaChiplets[mba],rank_config); + if(l_rc) return l_rc; + l_rc = FAPI_ATTR_GET(ATTR_VPD_DIMM_SPARE,&l_mbaChiplets[mba],num_spares); + if(l_rc) return l_rc; + for(uint32_t port=0;port<2;port++) { + for(uint32_t dimm=0;dimm<2;dimm++) { + //adds the appropriate number of DRAM found per dimm for each rank + if(dram_width == fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X4) num_chips += 18*rank_config[port][dimm]; + else num_chips += 9*rank_config[port][dimm]; + for(uint32_t rank=0;rank<4;rank++) { + //figures out the spares + if(dram_width == fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X4) { + if(num_spares[port][dimm][rank] == fapi::ENUM_ATTR_EFF_DIMM_SPARE_LOW_NIBBLE) { + num_chips += rank_config[port][dimm]; + } + if(num_spares[port][dimm][rank] == fapi::ENUM_ATTR_EFF_DIMM_SPARE_HIGH_NIBBLE) { + num_chips += rank_config[port][dimm]; + } + if(num_spares[port][dimm][rank] == fapi::ENUM_ATTR_EFF_DIMM_SPARE_FULL_BYTE) { + num_chips += 2*rank_config[port][dimm]; + } + } + else { + if(num_spares[port][dimm][rank] == fapi::ENUM_ATTR_EFF_DIMM_SPARE_FULL_BYTE) { + num_chips += rank_config[port][dimm]; + } + } + } + } + } + } + } + + FAPI_INF("vpp_slope: %d uV/DRAM chip vpp_intercept: %d mV num_chips: %d DRAM chips\n",vpp_slope,vpp_intercept,num_chips); + + //does the final computation + uint32_t param_vpp_voltage_uv = vpp_slope*num_chips+1000*vpp_intercept; + //rounds and converts the voltage offset into mV + uint32_t param_vpp_voltage_mv = (500 + param_vpp_voltage_uv) / 1000; + FAPI_INF("ATTR_MSS_VPP_OFFSET: %d mV",param_vpp_voltage_mv); + + //sets the output attributes + for(uint32_t i = 0; i< i_targets.size();i++) { + l_rc = FAPI_ATTR_SET(ATTR_MSS_VPP_OFFSET,&i_targets[i],param_vpp_voltage_mv); + if(l_rc) return l_rc; + }//end for + + return l_rc; +} diff --git a/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.H b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.H new file mode 100644 index 000000000..759ef18e6 --- /dev/null +++ b/src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.H @@ -0,0 +1,70 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mc_config/mss_volt/mss_volt_vpp_offset.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2014 */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: mss_volt_vpp_offset.H,v 1.4 2014/06/18 20:34:43 dcadiga Exp $ +//------------------------------------------------------------------------------ +// *! (C) Copyright International Business Machines Corp. 2011 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//------------------------------------------------------------------------------ +// *! TITLE : mss_volt_vpp_offset.H +// *! DESCRIPTION : see additional comments below +// *! OWNER NAME : Stephen Glancy Email: sglancy@us.ibm.com +// *! BACKUP NAME : Jacob Sloat Email: jdsloat@us.ibm.com +// *! ADDITIONAL COMMENTS : +// +// Header file for mss_volt_vpp_offset. +// +//------------------------------------------------------------------------------ +// Don't forget to create CVS comments when you check in your changes! +//------------------------------------------------------------------------------ +// CHANGE HISTORY: +//------------------------------------------------------------------------------ +// Version:| Author: | Date: | Comment: +//---------|----------|----------|----------------------------------------------- +// 1.4 | sglancy | 06/16/14 | Updated to fix formatting +// 1.3 | sglancy | 06/04/14 | Updated to account for output attribute +// 1.2 | sglancy | 05/30/14 | changed function to return a value in uV +// 1.1 | sglancy | 05/20/14 | initial drop +#ifndef MSS_VOLT_VPP_OFFSET_H_ +#define MSS_VOLT_VPP_OFFSET_H_ + +#include <fapi.H> + +typedef fapi::ReturnCode (*mss_volt_vpp_offset_FP_t)(std::vector<fapi::Target> &); + +extern "C" +{ + +/** + * @brief mss_volt_vpp_offset procedure. Determines operating vpp voltage for dimms behind a vpp voltage domain + * + * @param[in] std::vector<fapi::Target> l_targets Reference to vector of Centaur Targets in a particular vpp power domain + * + * @return ReturnCode + */ + + fapi::ReturnCode mss_volt_vpp_offset(std::vector<fapi::Target> & i_targets); + +} // extern "C" + +#endif // MSS_VOLT_VPP_OFFSET_H_ diff --git a/src/usr/hwpf/hwp/memory_attributes.xml b/src/usr/hwpf/hwp/memory_attributes.xml index 1354b8af6..638b5c839 100644 --- a/src/usr/hwpf/hwp/memory_attributes.xml +++ b/src/usr/hwpf/hwp/memory_attributes.xml @@ -21,7 +21,7 @@ <!-- --> <!-- IBM_PROLOG_END_TAG --> <attributes> -<!-- $Id: memory_attributes.xml,v 1.113 2014/04/17 15:57:49 jdsloat Exp $ --> +<!-- $Id: memory_attributes.xml,v 1.124 2014/06/19 18:45:01 jdsloat Exp $ --> <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB --> <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP --> <!-- *********************************************************************** --> @@ -39,6 +39,18 @@ firmware notes: none</description> </attribute> <attribute> + <id>ATTR_MSS_VOLT_VPP</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>DRAM VPP Voltage, each voltage rail would need to have a value. Computed in mss_volt C code - in millivolts. 0V - DDR3, 2.5V - DDR4 +creator: mss_volt +consumer: mss_eff_cnfg, others +firmware notes: none</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> <id>ATTR_MSS_FREQ_OVERRIDE</id> <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> <description>FOR LAB USE ONLY: Frequency override of this memory channel in MHz, comprising of up to three DIMMs. Set by config file or an attribute writing program. Consumed by mss_freq. The default of AUTO means mss_freq will find the best frequencies given the DIMMs plugged in and other rules. Otherwise, this is the system frequency. @@ -2538,6 +2550,276 @@ Will be set at an MBA level with one policy to be used</description> <odmVisable/> </attribute> +<attribute> + <id>ATTR_MSS_AVDD_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to AVDD. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VDD. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDDR_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VDDR. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_SLOPE_ACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID AVDD adjustment for ACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_SLOPE_INACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID AVDD adjustment for INACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID AVDD adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_SLOPE_ACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VDD adjustment for ACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_SLOPE_INACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VDD adjustment for INACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID VDD adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_SLOPE_ACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VCS adjustment for ACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_SLOPE_INACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VCS adjustment for INACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID VCS adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_SLOPE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VPP adjustment for all parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID VPP adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR3_VDDR_SLOPE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR3_VDDR_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR4_VDDR_SLOPE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR4_VDDR_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VOLT_OVERRIDE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Possible DRAM voltage override.</description> + <valueType>uint8</valueType> + <enum>NONE = 0x00, VOLT_135 = 0x01, VOLT_120 = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_POWER_CONTROL_CAPABLE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Capable power control settings.</description> + <valueType>uint8</valueType> + <enum>NONE = 0x00, SLOWEXIT_CAPABLE = 0x01, FASTEXIT_CAPABLE = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_POWER_CONTROL_REQUESTED</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Capable power control settings.</description> + <valueType>uint8</valueType> + <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to AVDD. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VDD. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VCS. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VPP. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDDR_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VDDR. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDDR_OVERIDE_SPD</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Possible VDDR voltage override.</description> + <valueType>uint8</valueType> + <enum>NONE = 0x00, VOLT_1350 = 0x01, VOLT_1200 = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB --> <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP --> </attributes> diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile index a041714cb..043f661d6 100644 --- a/src/usr/hwpf/makefile +++ b/src/usr/hwpf/makefile @@ -30,6 +30,7 @@ SUBDIRS = fapi.d hwp.d plat.d test.d #------------------------------------------------------------------------------ # Source XML files #------------------------------------------------------------------------------ + HWP_ERROR_XML_FILES += hwp/fapiHwpErrorInfo.xml HWP_ERROR_XML_FILES += hwp/dmi_training/proc_cen_framelock/proc_cen_framelock_errors.xml HWP_ERROR_XML_FILES += hwp/dimm_errors.xml @@ -95,6 +96,11 @@ HWP_ERROR_XML_FILES += hwp/proc_cfam_registers.xml HWP_ERROR_XML_FILES += hwp/p8_slw_registers.xml HWP_ERROR_XML_FILES += hwp/utility_procedures/memory_mss_maint_cmds.xml HWP_ERROR_XML_FILES += hwp/mc_config/mss_volt/memory_mss_volt.xml +HWP_ERROR_XML_FILES += hwp/mc_config/mss_volt/memory_mss_volt_avdd_offset.xml +HWP_ERROR_XML_FILES += hwp/mc_config/mss_volt/memory_mss_volt_vdd_offset.xml +HWP_ERROR_XML_FILES += hwp/mc_config/mss_volt/memory_mss_volt_vcs_offset.xml +HWP_ERROR_XML_FILES += hwp/mc_config/mss_volt/memory_mss_volt_vpp_offset.xml +HWP_ERROR_XML_FILES += hwp/mc_config/mss_volt/memory_mss_volt_vddr_offset.xml HWP_ERROR_XML_FILES += hwp/mc_config/mss_freq/memory_mss_freq.xml HWP_ERROR_XML_FILES += hwp/mc_config/mss_eff_config/memory_mss_eff_grouping.xml HWP_ERROR_XML_FILES += hwp/mc_config/mss_eff_config/memory_mss_eff_config_thermal.xml diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 031752633..a93c4a12e 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -122,7 +122,6 @@ if ($sysname =~ /brazos/) $placement = 0x3; #DRAWER } - push @systemAttr, [ "FREQ_PROC_REFCLOCK", $reqPol->{'processor-refclock-frequency'}->{content}, @@ -219,6 +218,61 @@ if ($MAXNODE > 1 && $sysname !~ m/mfg/) push @systemAttr, ["DO_ABUS_DECONFIG", 0]; } +# Process optional policies related to dyanmic VID +my $optMrwPolicies = $sysPolicy->{"optional-policy-settings"}; +use constant MRW_NAME => 'mrw-name'; + +my %optTargPolicies = (); +$optTargPolicies{'MSS_CENT_AVDD_OFFSET_DISABLE'}{MRW_NAME} + = "mem_avdd_offset_disable" ; +$optTargPolicies{'MSS_CENT_VDD_OFFSET_DISABLE'}{MRW_NAME} + = "mem_vdd_offset_disable" ; +$optTargPolicies{'MSS_CENT_VCS_OFFSET_DISABLE'}{MRW_NAME} + = "mem_vcs_offset_disable" ; +$optTargPolicies{'MSS_VOLT_VPP_OFFSET_DISABLE'}{MRW_NAME} + = "mem_vpp_offset_disable" ; +$optTargPolicies{'MSS_VOLT_VDDR_OFFSET_DISABLE'}{MRW_NAME} + = "mem_vddr_offset_disable" ; +$optTargPolicies{'MSS_CENT_AVDD_SLOPE_ACTIVE'}{MRW_NAME} + = "mem_avdd_slope_active" ; +$optTargPolicies{'MSS_CENT_AVDD_SLOPE_INACTIVE'}{MRW_NAME} + = "mem_avdd_slope_inactive" ; +$optTargPolicies{'MSS_CENT_AVDD_INTERCEPT'}{MRW_NAME} + = "mem_avdd_intercept" ; +$optTargPolicies{'MSS_CENT_VDD_SLOPE_ACTIVE'}{MRW_NAME} + = "mem_vdd_slope_active" ; +$optTargPolicies{'MSS_CENT_VDD_SLOPE_INACTIVE'}{MRW_NAME} + = "mem_vdd_slope_inactive" ; +$optTargPolicies{'MSS_CENT_VDD_INTERCEPT'}{MRW_NAME} + = "mem_vdd_intercept" ; +$optTargPolicies{'MSS_CENT_VCS_SLOPE_ACTIVE'}{MRW_NAME} + = "mem_vcs_slope_active" ; +$optTargPolicies{'MSS_CENT_VCS_SLOPE_INACTIVE'}{MRW_NAME} + = "mem_vcs_slope_inactive" ; +$optTargPolicies{'MSS_CENT_VCS_INTERCEPT'}{MRW_NAME} + = "mem_vcs_intercept" ; +$optTargPolicies{'MSS_VOLT_VPP_SLOPE'}{MRW_NAME} + = "mem_vpp_slope" ; +$optTargPolicies{'MSS_VOLT_VPP_INTERCEPT'}{MRW_NAME} + = "mem_vpp_intercept" ; +$optTargPolicies{'MSS_VOLT_DDR3_VDDR_SLOPE'}{MRW_NAME} + = "mem_ddr3_vddr_slope" ; +$optTargPolicies{'MSS_VOLT_DDR3_VDDR_INTERCEPT'}{MRW_NAME} + = "mem_ddr3_vddr_intercept" ; +$optTargPolicies{'MSS_VOLT_DDR4_VDDR_SLOPE'}{MRW_NAME} + = "mem_ddr4_vddr_slope" ; +$optTargPolicies{'MSS_VOLT_DDR4_VDDR_INTERCEPT'}{MRW_NAME} + = "mem_ddr4_vddr_intercept" ; + +foreach my $policy ( keys %optTargPolicies ) +{ + if(exists $optMrwPolicies->{ $optTargPolicies{$policy}{MRW_NAME}}) + { + push @systemAttr, [ $policy , + $optMrwPolicies->{$optTargPolicies{$policy}{MRW_NAME}}]; + } +} + #------------------------------------------------------------------------------ # Process the pm-settings MRW file #------------------------------------------------------------------------------ @@ -458,60 +512,100 @@ foreach my $dmi (@{$dmibus->{'dmi-bus'}}) # Process the cent-vrds MRW file #------------------------------------------------------------------------------ my $cent_vrds_file = open_mrw_file($mrwdir, "${sysname}-cent-vrds.xml"); -my $vmemCentaur = XMLin($cent_vrds_file); - -# Capture all pnor attributes into the @unsortedPnorTargets array -use constant VMEM_DEV_PATH_FIELD => 0; -use constant VMEM_I2C_ADDR_FIELD => 1; -use constant VMEM_ID_FIELD => 2; -use constant VMEM_NODE_FIELD => 3; -use constant VMEM_POS_FIELD => 4; +my $mrwMemVoltageDomains = XMLin($cent_vrds_file); + +our %vrmHash = (); +my %membufVrmUuidHash = (); +my %vrmIdHash = (); +my %validVrmTypes + = ('VMEM' => 1,'AVDD' => 1,'VCS' => 1,'VPP' => 1,'VDD' => 1); +use constant VRM_I2C_DEVICE_PATH => 'vrmI2cDevicePath'; +use constant VRM_I2C_ADDRESS => 'vrmI2cAddress'; +use constant VRM_DOMAIN_TYPE => 'vrmDomainType'; +use constant VRM_DOMAIN_ID => 'vrmDomainId'; +use constant VRM_UUID => 'vrmUuid'; + +foreach my $mrwMemVoltageDomain ( + @{$mrwMemVoltageDomains->{'centaur-vrd-connection'}}) +{ + if( (!exists $mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'}) + || (!exists $mrwMemVoltageDomain->{'vrd'}->{'i2c-address'}) + || (ref($mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'}) eq "HASH") + || (ref($mrwMemVoltageDomain->{'vrd'}->{'i2c-address'}) eq "HASH") + || ($mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'} eq "") + || ($mrwMemVoltageDomain->{'vrd'}->{'i2c-address'} eq "")) + { + next; + } -my $vmemId = 0x0; + my $vrmDev = $mrwMemVoltageDomain->{'vrd'}->{'i2c-dev-path'}; + my $vrmAddr = $mrwMemVoltageDomain->{'vrd'}->{'i2c-address'}; + my $vrmType = uc $mrwMemVoltageDomain->{'vrd'}->{'type'}; + my $membufInstance = + "n" . $mrwMemVoltageDomain->{'centaur'}->{'target'}->{'node'} . + ":p" . $mrwMemVoltageDomain->{'centaur'}->{'target'}->{'position'}; -my @unsortedVmem; -my @vmemArray; -my @vmemDevAddr; -my $vmemValue =0; -my $found=0; -my $loc=0; -my $newValue =0; + if(!exists $validVrmTypes{$vrmType}) + { + die "Illegal VRM type of $vrmType used\n"; + } -foreach my $i (@{$vmemCentaur->{'centaur-vrd-connection'}}) -{ - my $vmemDev = $i->{'vrd'}->{'i2c-dev-path'}; - my $vmemAddr = $i->{'vrd'}->{'i2c-address'}; + if(!exists $vrmIdHash{$vrmType}) + { + $vrmIdHash{$vrmType} = 0; + } - for my $j (0 .. $#vmemDevAddr) + my $uuid = -1; + foreach my $vrm ( keys %vrmHash ) { - if ( ($vmemDev eq $vmemDevAddr[$j][VMEM_DEV_PATH_FIELD]) && - ($vmemAddr eq $vmemDevAddr[$j][VMEM_I2C_ADDR_FIELD]) ) + if( ($vrmHash{$vrm}{VRM_I2C_DEVICE_PATH} eq $vrmDev ) + && ($vrmHash{$vrm}{VRM_I2C_ADDRESS} eq $vrmAddr) + && ($vrmHash{$vrm}{VRM_DOMAIN_TYPE} eq $vrmType) ) { - $found =1; - $vmemValue=$vmemDevAddr[$j][VMEM_ID_FIELD]; + $uuid = $vrm; last; } - else - { - $found=0; - } + } - if ($found ==0) + + if($uuid == -1) { - $vmemValue=$newValue++; - push (@vmemDevAddr,[$vmemDev, $vmemAddr, $vmemValue]); + my $vrm = scalar keys %vrmHash; + $vrmHash{$vrm}{VRM_I2C_DEVICE_PATH} = $vrmDev; + $vrmHash{$vrm}{VRM_I2C_ADDRESS} = $vrmAddr; + $vrmHash{$vrm}{VRM_DOMAIN_TYPE} = $vrmType; + $vrmHash{$vrm}{VRM_DOMAIN_ID} = + $vrmIdHash{$vrmType}++; + $uuid = $vrm; } - - my $vmemNode = $i->{'centaur'}->{'target'}->{'node'}; - my $vmemPosition = $i->{'centaur'}->{'target'}->{'position'}; - - push (@unsortedVmem,[$vmemDev, $vmemAddr, $vmemValue, $vmemNode, - $vmemPosition]); + $membufVrmUuidHash{$membufInstance}{$vrmType}{VRM_UUID} = $uuid; } +my $vrmDebug = 0; +if($vrmDebug) +{ + foreach my $membuf ( keys %membufVrmUuidHash) + { + print STDOUT "Membuf instance: " . $membuf . "\n"; -my @SortedVmem = sort byVmemNodePos @unsortedVmem; + foreach my $vrmType ( keys %{$membufVrmUuidHash{$membuf}} ) + { + print STDOUT "VRM type: " . $vrmType . "\n"; + print STDOUT "VRM UUID: " . + $membufVrmUuidHash{$membuf}{$vrmType}{VRM_UUID} . "\n"; + } + } + + foreach my $vrm ( keys %vrmHash) + { + print STDOUT "VRM UUID: " . $vrm . "\n"; + print STDOUT "VRM type: " . $vrmHash{$vrm}{VRM_DOMAIN_TYPE} . "\n"; + print STDOUT "VRM id: " . $vrmHash{$vrm}{VRM_DOMAIN_ID} . "\n"; + print STDOUT "VRM dev: " . $vrmHash{$vrm}{VRM_I2C_DEVICE_PATH} . "\n"; + print STDOUT "VRM addr: " . $vrmHash{$vrm}{VRM_I2C_ADDRESS} . "\n"; + } +} #------------------------------------------------------------------------------ # Process the cec-chips and pcie-busses MRW files @@ -1021,7 +1115,6 @@ my @fru_paths; my $hasProc = 0; my $hash_ax_buses; my $axBusesHuidInit = 0; -my $vmem_count =0; for (my $curnode = 0; $curnode <= $MAXNODE; $curnode++) { @@ -1260,7 +1353,6 @@ for (my $do_core = 0, my $i = 0; $i <= $#STargets; $i++) my $memb; my $membMcs; my $mba_count = 0; -my $vmem_id =0; for my $i ( 0 .. $#STargets ) { @@ -1321,17 +1413,9 @@ for my $i ( 0 .. $#STargets ) my $relativeCentaurRid = $STargets[$i][PLUG_POS] + (CDIMM_RID_NODE_MULTIPLIER * $STargets[$i][NODE_FIELD]); - #should note that the $SortedVmem is sorted by node and position and - #currently $STargets is also sorted by node and postion. If this ever - #changes then will need to make a modification here - my $vmemDevPath=$SortedVmem[$vmem_count][VMEM_DEV_PATH_FIELD]; - my $vmemAddr=$SortedVmem[$vmem_count][VMEM_I2C_ADDR_FIELD]; - my $vmem_id=$SortedVmem[$vmem_count][VMEM_ID_FIELD]; - $vmem_count++; - generate_centaur( $memb, $membMcs, \@fsi, \@altfsi, $ipath, $STargets[$i][ORDINAL_FIELD],$relativeCentaurRid, - $vmem_id, $vmemDevPath, $vmemAddr, $ipath); + $ipath, $membufVrmUuidHash{"n${node}:p${memb}"}); } elsif ($STargets[$i][NAME_FIELD] eq "mba") { @@ -1651,37 +1735,6 @@ sub byNodePos($$) return $retVal; } -################################################################################ -# Compares two Vmem instances based on the node and position # -################################################################################ -sub byVmemNodePos($$) -{ - my $retVal = -1; - - my $lhsInstance_node = $_[0][VMEM_NODE_FIELD]; - my $rhsInstance_node = $_[1][VMEM_NODE_FIELD]; - if(int($lhsInstance_node) eq int($rhsInstance_node)) - { - my $lhsInstance_pos = $_[0][VMEM_POS_FIELD]; - my $rhsInstance_pos = $_[1][VMEM_POS_FIELD]; - if(int($lhsInstance_pos) eq int($rhsInstance_pos)) - { - die "ERROR: Duplicate vmem positions: 2 vmem with same - node and position, \ - NODE: $lhsInstance_node POSITION: $lhsInstance_pos\n"; - } - elsif(int($lhsInstance_pos) > int($rhsInstance_pos)) - { - $retVal = 1; - } - } - elsif(int($lhsInstance_node) > int($rhsInstance_node)) - { - $retVal = 1; - } - return $retVal; -} - sub generate_sys { my $plat = 0; @@ -3035,7 +3088,8 @@ sub generate_logicalDimms sub generate_centaur { my ($ctaur, $mcs, $fsiA, $altfsiA, $ipath, $ordinalId, $relativeCentaurRid, - $vmemId, $vmemDevPath, $vmemAddr, $ipath) = @_; + $ipath, $membufVrmUuidHash) = @_; + my @fsi = @{$fsiA}; my @altfsi = @{$altfsiA}; my $scomFspApath = $devpath->{chip}->{$ipath}->{'scom-path-a'}; @@ -3107,10 +3161,6 @@ sub generate_centaur <default>instance:$ipath</default> </compileAttribute> <attribute> - <id>VMEM_ID</id> - <default>$vmemId</default> - </attribute> - <attribute> <id>EI_BUS_TX_MSBSWAP</id> <default>$msb_swap</default> </attribute>"; @@ -3192,10 +3242,21 @@ sub generate_centaur <default>$lane_swap</default> </attribute>"; + foreach my $vrmType ( keys %$membufVrmUuidHash ) + { + my $key = $membufVrmUuidHash->{$vrmType}{VRM_UUID}; + print + "\n" + . " <attribute>\n" + . " <id>$vrmType" . "_ID</id>\n" + . " <default>$vrmHash{$key}{VRM_DOMAIN_ID}</default>\n" + . " </attribute>"; + } + # call to do any fsp per-centaur attributes do_plugin('fsp_centaur', $scomFspApath, $scomFspAsize, $scanFspApath, $scanFspAsize, $scomFspBpath, $scomFspBsize, $scanFspBpath, - $scanFspBsize, $vmemDevPath, $vmemAddr, $relativeCentaurRid, $ordinalId); + $scanFspBsize, $relativeCentaurRid, $ordinalId, $membufVrmUuidHash); print "\n</targetInstance>\n"; diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 2887cccc0..d5be9f15c 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -5737,6 +5737,74 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> + <id>AVDD_ID</id> + <description> + Memory AVDD voltage domain ID. All memory buffers in the same AVDD + voltage domain will share the same ID. IDs are arbitrarily assigned, + used for correlation between HB + HWSV, and are generated by + genHwsvMrwXml.pl + </description> + <simpleType> + <uint16_t> + <default>0</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>VDD_ID</id> + <description> + Memory VDD voltage domain ID. All memory buffers in the same VDD + voltage domain will share the same ID. IDs are arbitrarily assigned, + used for correlation between HB + HWSV, and are generated by + genHwsvMrwXml.pl + </description> + <simpleType> + <uint16_t> + <default>0</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>VCS_ID</id> + <description> + Memory VCS voltage domain ID. All memory buffers in the same VCS + voltage domain will share the same ID. IDs are arbitrarily assigned, + used for correlation between HB + HWSV, and are generated by + genHwsvMrwXml.pl + </description> + <simpleType> + <uint16_t> + <default>0</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> + <id>VPP_ID</id> + <description> + Memory VPP voltage domain ID. All memory buffers in the same VPP + voltage domain will share the same ID. IDs are arbitrarily assigned, + used for correlation between HB + HWSV, and are generated by + genHwsvMrwXml.pl + </description> + <simpleType> + <uint16_t> + <default>0</default> + </uint16_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + +<attribute> <id>VMEM_ID</id> <description>Voltage Memory Rail Manager ID. Currently HB only needs to configured the Vmem voltage rail manger during the IPL. The ID @@ -6130,6 +6198,25 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> + <id>VPP_BASE</id> + <description> + DRAM VPP voltage domain base voltage in mV. Managed by HWPs. + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VOLT_VPP</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> <id>MSS_FREQ</id> <description>Frequency of memory channel in MHz. Initialized and used by HWPs.</description> <simpleType> @@ -12101,4 +12188,546 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript <readable/> </attribute> +<attribute> + <id>MEM_AVDD_OFFSET_MILLIVOLTS</id> + <description>Memory AVDD voltage domain offset in mV.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_AVDD_OFFSET</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MEM_VDD_OFFSET_MILLIVOLTS</id> + <description>Memory VDD voltage domain offset in mV.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDD_OFFSET</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MEM_VCS_OFFSET_MILLIVOLTS</id> + <description>Memory VCS voltage domain offset in mV.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VCS_OFFSET</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MEM_VPP_OFFSET_MILLIVOLTS</id> + <description>Memory VPP voltage domain offset in mV.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VPP_OFFSET</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MEM_VDDR_OFFSET_MILLIVOLTS</id> + <description>Memory VDDR voltage domain offset in mV.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDDR_OFFSET</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_AVDD_OFFSET_DISABLE</id> + <description> + Boolean indicating whether to disable configuring VDDR offset voltage + for memory voltage domains. + 0x00 = Enable VDDR offset voltage for memory voltage domains + 0x01 = Disable VDDR offset voltage for memory voltage domains + </description> + <simpleType> + <uint8_t> + <default>1</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_AVDD_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VDD_OFFSET_DISABLE</id> + <description> + Boolean indicating whether to disable configuring VDD offset voltage + for memory voltage domains. + 0x00 = Enable VDD offset voltage for memory voltage domains + 0x01 = Disable VDD offset voltage for memory voltage domains + </description> + <simpleType> + <uint8_t> + <default>1</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDD_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VCS_OFFSET_DISABLE</id> + <description> + Boolean indicating whether to disable configuring VCS offset voltage + for memory voltage domains. + 0x00 = Enable VCS offset voltage for memory voltage domains + 0x01 = Disable VCS offset voltage for memory voltage domains + </description> + <simpleType> + <uint8_t> + <default>1</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VCS_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_VPP_OFFSET_DISABLE</id> + <description> + Boolean indicating whether to disable configuring VPP offset voltage + for memory voltage domains. + 0x00 = Enable VPP offset voltage for memory voltage domains + 0x01 = Disable VPP offset voltage for memory voltage domains + If disabled, Hostboot will send VPP_BASE in place of this to program the + VPP voltage domain. + </description> + <simpleType> + <uint8_t> + <default>1</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VPP_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_VDDR_OFFSET_DISABLE</id> + <description> + Boolean indicating whether to disable configuring VDDR offset voltage + for memory voltage domains. + 0x00 = Enable VDDR offset voltage for memory voltage domains + 0x01 = Disable VDDR offset voltage for memory voltage domains + If disabled, Hostboot will send MSS_VOLT in place of this to program the + VDDR voltage domain. + </description> + <simpleType> + <uint8_t> + <default>1</default> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDDR_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_AVDD_SLOPE_ACTIVE</id> + <description>Units: uV/Membuf + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_AVDD_SLOPE_ACTIVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_AVDD_SLOPE_INACTIVE</id> + <description>Units: uV/Membuf + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_AVDD_SLOPE_INACTIVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_AVDD_INTERCEPT</id> + <description>Units: mV + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_AVDD_SLOPE_INTERCEPT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VDD_SLOPE_ACTIVE</id> + <description>Units: uV/Membuf + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDD_SLOPE_ACTIVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VDD_SLOPE_INACTIVE</id> + <description>Units: uV/Membuf + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDD_SLOPE_INACTIVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VDD_INTERCEPT</id> + <description>Units: mV + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDD_SLOPE_INTERCEPT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VCS_SLOPE_ACTIVE</id> + <description>Units: uV/Membuf + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VCS_SLOPE_ACTIVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VCS_SLOPE_INACTIVE</id> + <description>Units: uV/Membuf + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VCS_SLOPE_INACTIVE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CENT_VCS_INTERCEPT</id> + <description>Units: mV + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VCS_SLOPE_INTERCEPT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_VPP_SLOPE</id> + <description>Units: uV/DRAM + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VPP_SLOPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_VPP_INTERCEPT</id> + <description>Units: mV + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VPP_SLOPE_INTERCEPT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_DDR3_VDDR_SLOPE</id> + <description>Units: 1/Amps + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DDR3_VDDR_SLOPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_DDR3_VDDR_INTERCEPT</id> + <description>Units: mV + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DDR3_VDDR_INTERCEPT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_DDR4_VDDR_SLOPE</id> + <description>Units: 1/Amps + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DDR4_VDDR_SLOPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id> + <description>Units: mV + </description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DDR4_VDDR_INTERCEPT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VOLT_OVERRIDE</id> + <description> + Voltage override for MSS_VOLT. Used for membuf lab debug. + + 0x00 = None (default), no override + 0x01 = 1.35V + 0x02 = 1.20V + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VOLT_OVERRIDE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_VDDR_OVERIDE_SPD</id> + <description> + DIMM SPD voltage override for VDDR voltage calculations. + Used for lab debug. + + 0x00 = None (default), no override + 0x01 = 1.35V + 0x02 = 1.20V + </description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VDDR_OVERIDE_SPD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_POWER_CONTROL_REQUESTED</id> + <description> + Type of memory power control requested + + 0x00 = Off + 0x01 = SLOWEXIT + 0x02 = FASTEXIT + </description> + <simpleType> + <uint8_t> + <default>0x00</default> + </uint8_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_POWER_CONTROL_REQUESTED</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_POWER_CONTROL_CAPABLE</id> + <description> + Supported memory power control types + + 0x00 = NONE + 0x01 = SLOWEXIT_CAPABLE + 0x02 = FASTEXIT_CAPABLE + </description> + <simpleType> + <uint8_t> + <default>0x00</default> + </uint8_t> + </simpleType> + <persistency>volatile</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_POWER_CONTROL_CAPABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 1b8db96b2..cb412fef2 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -247,6 +247,27 @@ <attribute><id>PM_HWP_ATTR_VERSION</id></attribute> <attribute><id>DO_ABUS_DECONFIG</id></attribute> <attribute><id>REDUNDANT_CLOCKS</id></attribute> + <attribute><id>MSS_VOLT_VDDR_OFFSET_DISABLE</id></attribute> + <attribute><id>MSS_VOLT_VPP_OFFSET_DISABLE</id></attribute> + <attribute><id>MSS_CENT_VDD_OFFSET_DISABLE</id></attribute> + <attribute><id>MSS_CENT_VCS_OFFSET_DISABLE</id></attribute> + <attribute><id>MSS_CENT_AVDD_OFFSET_DISABLE</id></attribute> + <attribute><id>MSS_CENT_AVDD_SLOPE_ACTIVE</id></attribute> + <attribute><id>MSS_CENT_AVDD_SLOPE_INACTIVE</id></attribute> + <attribute><id>MSS_CENT_AVDD_INTERCEPT</id></attribute> + <attribute><id>MSS_CENT_VDD_SLOPE_ACTIVE</id></attribute> + <attribute><id>MSS_CENT_VDD_SLOPE_INACTIVE</id></attribute> + <attribute><id>MSS_CENT_VDD_INTERCEPT</id></attribute> + <attribute><id>MSS_CENT_VCS_SLOPE_ACTIVE</id></attribute> + <attribute><id>MSS_CENT_VCS_SLOPE_INACTIVE</id></attribute> + <attribute><id>MSS_CENT_VCS_INTERCEPT</id></attribute> + <attribute><id>MSS_VOLT_VPP_SLOPE</id></attribute> + <attribute><id>MSS_VOLT_VPP_INTERCEPT</id></attribute> + <attribute><id>MSS_VOLT_DDR3_VDDR_SLOPE</id></attribute> + <attribute><id>MSS_VOLT_DDR3_VDDR_INTERCEPT</id></attribute> + <attribute><id>MSS_VOLT_DDR4_VDDR_SLOPE</id></attribute> + <attribute><id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id></attribute> + <attribute><id>MSS_VDDR_OVERIDE_SPD</id></attribute> </targetType> <targetType> @@ -1109,6 +1130,12 @@ </attribute> <attribute><id>EEPROM_VPD_PRIMARY_INFO</id></attribute> <attribute><id>MSS_VOLT</id></attribute> + <attribute><id>VPP_BASE</id></attribute> + <attribute><id>MEM_VDDR_OFFSET_MILLIVOLTS</id></attribute> + <attribute><id>MEM_AVDD_OFFSET_MILLIVOLTS</id></attribute> + <attribute><id>MEM_VDD_OFFSET_MILLIVOLTS</id></attribute> + <attribute><id>MEM_VCS_OFFSET_MILLIVOLTS</id></attribute> + <attribute><id>MEM_VPP_OFFSET_MILLIVOLTS</id></attribute> <attribute><id>MSS_FREQ</id></attribute> <attribute><id>MSS_LAB_OVERRIDE_FOR_MEM_PLL</id></attribute> <attribute><id>ECID</id></attribute> @@ -1124,6 +1151,10 @@ </attribute> <attribute><id>MSS_CACHE_ENABLE</id></attribute> <attribute><id>VMEM_ID</id></attribute> + <attribute><id>AVDD_ID</id></attribute> + <attribute><id>VDD_ID</id></attribute> + <attribute><id>VCS_ID</id></attribute> + <attribute><id>VPP_ID</id></attribute> <attribute><id>EI_BUS_TX_LANE_INVERT</id></attribute> <!-- Begin poreve_memory_attributes.xml --> <attribute><id>SBE_SEEPROM_I2C_ADDRESS_BYTES</id></attribute> @@ -1144,6 +1175,9 @@ <attribute><id>MSS_NEST_CAPABLE_FREQUENCIES</id></attribute> <attribute><id>MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT</id></attribute> <attribute><id>MSS_DERIVED_MBA_CACHELINE_INTERLEAVE_MODE</id></attribute> + <attribute><id>MSS_VOLT_OVERRIDE</id></attribute> + <attribute><id>MSS_POWER_CONTROL_REQUESTED</id></attribute> + <attribute><id>MSS_POWER_CONTROL_CAPABLE</id></attribute> </targetType> <!-- Centaur L4 --> |
