diff options
Diffstat (limited to 'src/usr/hwpf/hwp/memory_attributes.xml')
| -rw-r--r-- | src/usr/hwpf/hwp/memory_attributes.xml | 284 |
1 files changed, 283 insertions, 1 deletions
diff --git a/src/usr/hwpf/hwp/memory_attributes.xml b/src/usr/hwpf/hwp/memory_attributes.xml index 1354b8af6..638b5c839 100644 --- a/src/usr/hwpf/hwp/memory_attributes.xml +++ b/src/usr/hwpf/hwp/memory_attributes.xml @@ -21,7 +21,7 @@ <!-- --> <!-- IBM_PROLOG_END_TAG --> <attributes> -<!-- $Id: memory_attributes.xml,v 1.113 2014/04/17 15:57:49 jdsloat Exp $ --> +<!-- $Id: memory_attributes.xml,v 1.124 2014/06/19 18:45:01 jdsloat Exp $ --> <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB --> <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP --> <!-- *********************************************************************** --> @@ -39,6 +39,18 @@ firmware notes: none</description> </attribute> <attribute> + <id>ATTR_MSS_VOLT_VPP</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>DRAM VPP Voltage, each voltage rail would need to have a value. Computed in mss_volt C code - in millivolts. 0V - DDR3, 2.5V - DDR4 +creator: mss_volt +consumer: mss_eff_cnfg, others +firmware notes: none</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> <id>ATTR_MSS_FREQ_OVERRIDE</id> <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> <description>FOR LAB USE ONLY: Frequency override of this memory channel in MHz, comprising of up to three DIMMs. Set by config file or an attribute writing program. Consumed by mss_freq. The default of AUTO means mss_freq will find the best frequencies given the DIMMs plugged in and other rules. Otherwise, this is the system frequency. @@ -2538,6 +2550,276 @@ Will be set at an MBA level with one policy to be used</description> <odmVisable/> </attribute> +<attribute> + <id>ATTR_MSS_AVDD_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to AVDD. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VDD. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VCS. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDDR_OFFSET_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Used for to determine whether to apply an offset to VDDR. Supplied by MRW.</description> + <valueType>uint8</valueType> + <enum>DISABLE = 1, ENABLE = 0</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_SLOPE_ACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID AVDD adjustment for ACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_SLOPE_INACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID AVDD adjustment for INACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID AVDD adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_SLOPE_ACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VDD adjustment for ACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_SLOPE_INACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VDD adjustment for INACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID VDD adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_SLOPE_ACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VCS adjustment for ACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_SLOPE_INACTIVE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VCS adjustment for INACTIVE parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID VCS adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_SLOPE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID VPP adjustment for all parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_SLOPE_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID VPP adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR3_VDDR_SLOPE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR3_VDDR_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR4_VDDR_SLOPE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Slope value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In uV/Centaur.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_DDR4_VDDR_INTERCEPT</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Intercept value used to determine the dynamic VID DDR3 VDDR adjustment for all parts. In mV.</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VOLT_OVERRIDE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Possible DRAM voltage override.</description> + <valueType>uint8</valueType> + <enum>NONE = 0x00, VOLT_135 = 0x01, VOLT_120 = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_POWER_CONTROL_CAPABLE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Capable power control settings.</description> + <valueType>uint8</valueType> + <enum>NONE = 0x00, SLOWEXIT_CAPABLE = 0x01, FASTEXIT_CAPABLE = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_POWER_CONTROL_REQUESTED</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Capable power control settings.</description> + <valueType>uint8</valueType> + <enum>OFF = 0x00, SLOWEXIT = 0x01, FASTEXIT = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_AVDD_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to AVDD. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDD_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VDD. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VCS_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VCS. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VPP_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VPP. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDDR_OFFSET</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Dynamic VID offset applied to VDDR. In mV.</description> + <valueType>uint32</valueType> + <writeable/> + <odmVisable/> +</attribute> + +<attribute> + <id>ATTR_MSS_VDDR_OVERIDE_SPD</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>Possible VDDR voltage override.</description> + <valueType>uint8</valueType> + <enum>NONE = 0x00, VOLT_1350 = 0x01, VOLT_1200 = 0x02</enum> + <platInit/> + <odmVisable/> +</attribute> + <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB --> <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP --> </attributes> |
