summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorDean Sanner <dsanner@us.ibm.com>2013-09-17 10:14:10 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-10-09 19:22:52 -0500
commit317a6c4dd591a626168c54df1ebc10b3e4faff24 (patch)
tree8b0d123ce5c013556738ac4901f4f3bba7d6da03 /src
parent2ffd66d3fe29208a1a08dac4ef7f21c51198f3e5 (diff)
downloadblackbird-hostboot-317a6c4dd591a626168c54df1ebc10b3e4faff24.tar.gz
blackbird-hostboot-317a6c4dd591a626168c54df1ebc10b3e4faff24.zip
SBE start workaround HWP for SPLess, p8_ocb_* HWP
Change-Id: Ie420cb8ef0fe15a0f5bc3c7f9229a3995c11f775 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6199 Tested-by: Jenkins Server Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/usr/hwpf/istepreasoncodes.H1
-rw-r--r--src/include/usr/isteps/istep06list.H1
-rw-r--r--src/usr/hwpf/hwp/occ/makefile4
-rw-r--r--src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C388
-rw-r--r--src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H122
-rw-r--r--src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C82
-rw-r--r--src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H56
-rw-r--r--src/usr/hwpf/hwp/proc_chip_ec_feature.xml25
-rw-r--r--src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml67
-rw-r--r--src/usr/hwpf/hwp/slave_sbe/makefile7
-rw-r--r--src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.C162
-rw-r--r--src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.H83
-rw-r--r--src/usr/hwpf/hwp/slave_sbe/slave_sbe.C112
-rw-r--r--src/usr/hwpf/makefile1
14 files changed, 1106 insertions, 5 deletions
diff --git a/src/include/usr/hwpf/istepreasoncodes.H b/src/include/usr/hwpf/istepreasoncodes.H
index 03de0fb9f..302c1f403 100644
--- a/src/include/usr/hwpf/istepreasoncodes.H
+++ b/src/include/usr/hwpf/istepreasoncodes.H
@@ -124,6 +124,7 @@ enum istepModuleId
ISTEP_DMI_POST_TRAINADV = 0x4C,
ISTEP_FABRIC_PRE_TRAINADV = 0x4D,
ISTEP_FABRIC_POST_TRAINADV = 0x4E,
+ ISTEP_PROC_SBE_START = 0x4F,
};
/**
diff --git a/src/include/usr/isteps/istep06list.H b/src/include/usr/isteps/istep06list.H
index 79bf0cc2f..5c0f7e17e 100644
--- a/src/include/usr/isteps/istep06list.H
+++ b/src/include/usr/isteps/istep06list.H
@@ -227,6 +227,7 @@ const TaskInfo g_istep06[] = {
const DepModInfo g_istep06Dependancies = {
{
+ DEP_LIB(libbuild_winkle_images.so), //proc_mailbox_utils
DEP_LIB(libslave_sbe.so),
{ 0 },
}
diff --git a/src/usr/hwpf/hwp/occ/makefile b/src/usr/hwpf/hwp/occ/makefile
index 3a7473721..51a499680 100644
--- a/src/usr/hwpf/hwp/occ/makefile
+++ b/src/usr/hwpf/hwp/occ/makefile
@@ -70,7 +70,9 @@ OBJS = occ.o \
#they can implement OCC Reset.
OBJS+= p8_pm_prep_for_reset.o \
proc_cpu_special_wakeup.o \
- p8_pmc_force_vsafe.o
+ p8_pmc_force_vsafe.o \
+ p8_ocb_indir_access.o \
+ p8_ocb_indir_setup_linear.o
## NOTE: add a new directory onto the vpaths when you add a new HWP
## EXAMPLE:
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C
new file mode 100644
index 000000000..27f8f988d
--- /dev/null
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C
@@ -0,0 +1,388 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: p8_ocb_indir_access.C,v 1.2 2012/12/08 14:01:47 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_access.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! OWNER NAME: Greg Still Email: stillgs@us.ibm.com
+// *!
+/// \file p8_ocb_indir_access.C
+/// \brief Performs the data transfer to/from an OCB indirect channel
+///
+///
+/// \todo add to required proc ENUM requests
+///
+/// High-level procedure flow:
+/// \verbatim
+///
+///
+/// Per HW220256, for Murano DD1, a push (Put) must first check for non-full
+/// condition to avoid a data corruption scenario. This is fixed in
+/// Venice DD1.
+/// \endverbatim
+///
+//------------------------------------------------------------------------------
+
+
+// ----------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------
+#include "p8_pm.H"
+#include "p8_ocb_indir_access.H"
+
+
+using namespace fapi;
+
+extern "C" {
+
+// ----------------------------------------------------------------------
+// Constant definitions
+// ----------------------------------------------------------------------
+
+// Needed for HW220256 protection
+// Set to 10ms at 2us per read
+//#define OCB_FULL_POLL_MAX 10000/2
+// temp for sim
+#define OCB_FULL_POLL_MAX 4
+#define OCB_FULL_POLL_DELAY_HDW 0
+#define OCB_FULL_POLL_DELAY_SIM 0
+
+// ----------------------------------------------------------------------
+// Global variables
+// ----------------------------------------------------------------------
+
+// ----------------------------------------------------------------------
+// Function prototypes
+// ----------------------------------------------------------------------
+
+// ----------------------------------------------------------------------
+// Function definitions
+// ----------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Function prototype
+//------------------------------------------------------------------------------
+/// \param[in] &i_target Chip target
+/// \param[in] i_ocb_chan OCB channel number (0, 1, 2, 3)
+/// \param[in] i_ocb_op Operation (Get, Put)
+/// \param[in] i_ocb_req_length Requested length in the number of 8B
+/// elements to be accessed (unit origin)
+/// Number of bytes = (i_ocb_req_length) *
+/// 8B
+/// \param[in/out] &io_ocb_buffer Reference to ecmdDataBuffer
+/// \param[out] &o_ocb_act_length Address containing to contain the actual
+/// length in the number of 8B elements to
+/// be accessed (zero origin)
+/// Number of bytes = (i_ocb_act_length+1) *
+/// 8B
+/// \param[in] i_oci_address_valid Indicator that oci_address is to be used
+/// \param[in] i_oci_address OCI Address to be used for the operation
+
+
+/// \retval ECMD_SUCCESS if something good happens,
+/// \retval BAD_RETURN_CODE otherwise
+fapi::ReturnCode
+p8_ocb_indir_access( const fapi::Target& i_target, \
+ uint32_t i_ocb_chan, \
+ uint32_t i_ocb_op, \
+ uint32_t i_ocb_req_length, \
+ ecmdDataBufferBase& io_ocb_buffer, \
+ uint32_t& o_ocb_act_length, \
+ bool i_oci_address_valid, \
+ uint32_t i_oci_address)
+{
+
+ fapi::ReturnCode rc;
+ uint32_t l_ecmdRc = 0;
+ ecmdDataBufferBase data(64);
+ ecmdDataBufferBase address(64);
+
+ uint64_t OCBAR_address = 0;
+ uint64_t OCBDR_address = 0;
+ uint64_t OCBCSR_address = 0;
+ uint64_t OCBSHCR_address = 0;
+ uint64_t temp_address = 0;
+
+ uint32_t buffer_ptr;
+
+ FAPI_INF("Executing p8_ocb_indir_access op %x channel %x of length (in 8B) %x....",
+ i_ocb_op, i_ocb_chan, i_ocb_req_length);
+
+ FAPI_DBG("Checking channel validity");
+ switch ( i_ocb_chan )
+ {
+ case 0:
+ OCBAR_address = OCB0_ADDRESS_0x0006B010;
+ OCBDR_address = OCB0_DATA_0x0006B015;
+ OCBCSR_address = OCB0_STATUS_CONTROL_0x0006B011;
+ OCBSHCR_address = OCB0_PUSH_STATUS_CONTROL_0x0006A204;
+ break;
+ case 1:
+ OCBAR_address = OCB1_ADDRESS_0x0006B030;
+ OCBDR_address = OCB1_DATA_0x0006B035;
+ OCBCSR_address = OCB1_STATUS_CONTROL_0x0006B031;
+ OCBSHCR_address = OCB1_PUSH_STATUS_CONTROL_0x0006A214;
+ break;
+ case 2:
+ OCBAR_address = OCB2_ADDRESS_0x0006B050;
+ OCBDR_address = OCB2_DATA_0x0006B055;
+ OCBCSR_address = OCB2_STATUS_CONTROL_0x0006B051;
+ OCBSHCR_address = OCB2_PUSH_STATUS_CONTROL_0x0006A224;
+ break;
+ case 3:
+ OCBAR_address = OCB3_ADDRESS_0x0006B070;
+ OCBDR_address = OCB3_DATA_0x0006B075;
+ break;
+ default:
+ FAPI_ERR("Invalid OCB access channel %x", i_ocb_chan);
+ FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_ACCESS_CHANNEL);
+ return rc;
+ }
+
+ /// -------------------------------
+ /// Deal with oci_address_valid condition.
+ /// If address is valid, write the relevant channel OCBAR
+ if ( i_oci_address_valid )
+ {
+
+ /// The following cases apply:
+ /// Circular Channel: OCBAR is irrelevant; write it anyway
+ /// Linear: OCBAR will set the accessed location
+ /// Linear Stream: OCBAR will establish the address from which
+ /// auto-increment will commence after
+ /// the first access
+
+ /// \todo: need to perform relevant error checking on the address value
+
+ FAPI_DBG("OCI Address Valid set with OCI Address = %08x",
+ i_oci_address);
+
+ l_ecmdRc |= data.flushTo0();
+ l_ecmdRc |= data.setWord(0, i_oci_address);
+ if (l_ecmdRc)
+ {
+ FAPI_ERR("Error (0x%x) setting up ecmdDataBufferBase", l_ecmdRc);
+ rc.setEcmdError(l_ecmdRc);
+ return rc;
+ }
+
+ rc=fapiPutScom(i_target, (const uint64_t)OCBAR_address, data);
+ if(rc)
+ {
+ FAPI_ERR("OCBAR Putscom failed");
+ return rc;
+ }
+
+ }
+
+ /// The else case is to not touch the OCBAR.
+ /// The following cases apply:
+ /// Circular Channel: OCBAR is irrelevant
+ /// Linear: OCBAR will continue to access the same location
+ /// Linear Stream: OCBAR will auto-increment
+
+ // Initialize output length
+ o_ocb_act_length = 0;
+
+ /// Based on the op, perform the data access
+ if ( i_ocb_op == OCB_PUT )
+ {
+
+ // Start HW220256 protection
+
+ // Determine if the channel is in circular mode. If so, proceed with
+ // checks.
+
+ temp_address = OCBCSR_address;
+ rc=fapiGetScom(i_target, temp_address, data);
+ if (rc)
+ {
+ FAPI_ERR("Get SCOM error for address 0x%08llX", temp_address);
+ return rc;
+ }
+
+ if (data.isBitSet(4) && data.isBitSet(5))
+ {
+ FAPI_DBG("Put: (MurDD1) Circular mode Put detected. Engage extra checks");
+
+ // Check if push queue is enabled. If not, let the store occur
+ // anyway to let the PIB error response return occur. (that is
+ // what will happen if this checking code were not here)
+ temp_address = OCBSHCR_address;
+ rc=fapiGetScom(i_target, temp_address, data);
+ if (rc)
+ {
+ FAPI_ERR("Get SCOM error for address 0x%08llX", temp_address);
+ return rc;
+ }
+
+ if (data.isBitSet(31))
+ {
+ FAPI_DBG("Put: (MurDD1) Poll for a non-full condition to a push "
+ "queue to avoid data corruption problem");
+
+ bool push_ok_flag = false;
+ int p = 0;
+ do
+ {
+ // If the OCB_OCI_OCBSHCS0_PUSH_FULL bit (bit 0) is clear, proceed.
+ // Otherwise, poll
+ if (data.isBitClear(0))
+ {
+ push_ok_flag = true;
+ FAPI_DBG("Put: (MurDD1) Push queue not full. Proceeding.");
+ break;
+ }
+
+ // Point to put in any needed delay.
+ // rc=fapiDelay(OCB_FULL_POLL_DELAY_HDW, OCB_FULL_POLL_DELAY_SIM);
+
+ rc=fapiGetScom(i_target, temp_address, data);
+ if (rc)
+ {
+ FAPI_ERR("Get SCOM error for address 0x%08llX", temp_address);
+ return rc;
+ }
+
+ p++;
+
+ } while (p < OCB_FULL_POLL_MAX);
+
+ if (!push_ok_flag)
+ {
+ FAPI_ERR("Put: Polling timeout waiting on push non-full");
+ FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_PUT_DATA_POLL_NOT_FULL_ERROR);
+ return rc;
+
+ }
+ }
+ }
+ // End HW220256 protection
+
+ FAPI_DBG("Put: Doublewords in passed io_ocb_buffer %x",
+ io_ocb_buffer.getDoubleWordLength());
+ if (io_ocb_buffer.getDoubleWordLength() == 0)
+ {
+ FAPI_ERR("Put: No data passed in io_ocb_buffer");
+ FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_PUT_DATA_LENGTH_ERROR);
+ return rc;
+ }
+
+ FAPI_DBG("Put: Checking buffer lengths - i_ocb_req_length: %x; io_ocb_buffer: %x",
+ i_ocb_req_length, io_ocb_buffer.getDoubleWordLength());
+
+ if ((i_ocb_req_length) != io_ocb_buffer.getDoubleWordLength())
+ {
+ FAPI_ERR("Put: io_ocb_buffer length does not match i_ocb_req_length");
+ FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_PUT_DATA_LENGTH_ERROR);
+ return rc;
+ }
+
+
+ // Walk the input buffer (io_ocb_buffer) 8B (64bits) at a time to write
+ // the channel data register
+ for (buffer_ptr=0; buffer_ptr < (i_ocb_req_length)*64; buffer_ptr+=64)
+ {
+
+ FAPI_DBG("Put: Copy 8B from parameter buffer at location %x into "
+ "working data buffer.", buffer_ptr);
+
+ l_ecmdRc |= data.insert(io_ocb_buffer, 0, 64, buffer_ptr);
+ if (l_ecmdRc)
+ {
+ FAPI_ERR("Put: data insert failed");
+ rc.setEcmdError(l_ecmdRc);
+ return rc;
+ }
+
+ rc = fapiPutScom(i_target, (const uint64_t)OCBDR_address, data);
+ if (rc)
+ {
+ FAPI_ERR("Put SCOM error for OCB indirect access");
+ return rc;
+ }
+ o_ocb_act_length++;
+ FAPI_DBG("Put: Increment output length to %x", o_ocb_act_length);
+ }
+ }
+ else if ( i_ocb_op == OCB_GET )
+ {
+
+ FAPI_DBG("Get: Setting the io_ocb_buffer size to %x doublewords",
+ i_ocb_req_length);
+ // Note: i_ocb_req_length is unit origin (eg 8B = length of 1)
+ l_ecmdRc |= io_ocb_buffer.setDoubleWordLength(i_ocb_req_length);
+ if (l_ecmdRc)
+ {
+ FAPI_ERR("Get: setDoubleWord failed");
+ rc.setEcmdError(l_ecmdRc);
+ return rc;
+ }
+
+ for (buffer_ptr=0; buffer_ptr < (i_ocb_req_length)*64; buffer_ptr+=64)
+ {
+ rc=fapiGetScom(i_target, (const uint64_t)OCBDR_address, data);
+ if (rc)
+ {
+ FAPI_ERR("Get SCOM error for OCB indirect access");
+ return rc;
+ }
+
+ FAPI_DBG("Get: Copy 8B from working data buffer into parameter "
+ "buffer at location: %x", buffer_ptr);
+ l_ecmdRc |= io_ocb_buffer.insert(data, buffer_ptr, 64, 0);
+ if (l_ecmdRc)
+ {
+ FAPI_ERR("Get Buffer copy error");
+ rc.setEcmdError(l_ecmdRc);
+ return rc;
+ }
+ o_ocb_act_length++;
+ FAPI_DBG("Get: Increment output length to %x", o_ocb_act_length);
+ }
+ }
+ else
+ {
+ FAPI_ERR("Invalid OCB access operation %x", i_ocb_op);
+ FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_ACCESS_OP);
+ return rc;
+ }
+
+ // If not non-zero SCOM rc, check that the lengths match.
+ if (i_ocb_req_length != o_ocb_act_length)
+ {
+ FAPI_ERR("OCB access length check failure: input = %8X; output = %8X",
+ i_ocb_req_length, o_ocb_act_length);
+ FAPI_SET_HWP_ERROR(rc, RC_PROCPM_OCB_ACCESS_LENGTH_CHECK);
+ return rc;
+ }
+
+ return rc;
+
+}
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H
new file mode 100644
index 000000000..97e32d5f5
--- /dev/null
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H
@@ -0,0 +1,122 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_access.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: p8_ocb_indir_access.H,v 1.1 2012/08/23 04:58:50 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_access.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : p8_ocb_indir_access.H
+// *! DESCRIPTION : Access procedure to the OCC OCB indirect channels
+// *!
+// *! OWNER NAME : Jim Yacynych Email: jimyac@us.ibm.com
+// *! BACKUP NAME : Greg Still Email: stillgs@us.ibm.com
+
+//------------------------------------------------------------------------------
+
+#ifndef _P8_OCBINDIRACC_H_
+#define _P8_OCBINDIRACC_H_
+
+
+extern "C" {
+
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode (*p8_ocb_indir_access_FP_t)
+ ( const fapi::Target&,
+ uint32_t,
+ uint32_t,
+ uint32_t,
+ ecmdDataBufferBase&,
+ uint32_t&,
+ bool,
+ uint32_t
+ );
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+
+#ifndef _P8_OCB_ACCESS_OP_
+#define _P8_OCB_ACCESS_OP_
+enum P8_OCB_ACCESS_OP {
+ OCB_GET = 0x1,
+ OCB_PUT = 0x2
+ };
+#endif // _P8_OCB_ACCESS_OP_
+
+
+//------------------------------------------------------------------------------
+// Parameter structure definitions
+//------------------------------------------------------------------------------
+
+
+
+//------------------------------------------------------------------------------
+// Function prototype
+//------------------------------------------------------------------------------
+
+/// \brief Provides for the abstract access to an OCB indirect channel that has
+/// been configured previously via p8_ocb_indir_setup_[linear/circular]
+/// procedures
+///
+/// \param[in] &i_target Chip target
+/// \param[in] i_ocb_chan OCB channel number (0, 1, 2, 3)
+/// \param[in] i_ocb_op Operation (Get, Put)
+/// \param[in] i_ocb_req_length Requested length in the number of 8B
+/// elements to be accessed (unit origin)
+/// Number of bytes = (i_ocb_req_length) *
+/// 8B
+/// \param[in/out] &io_ocb_buffer Reference to ecmdDataBuffer
+/// \param[out] &o_ocb_act_length Address containing to contain the actual
+/// length in the number of 8B elements to
+/// be accessed (zero origin)
+/// Number of bytes = (i_ocb_act_length+1) *
+/// 8B
+/// \param[in] i_oci_address_valid Indicator that oci_address is to be used
+/// \param[in] i_oci_address OCI Address to be used for the operation
+
+/// \retval ECMD_SUCCESS if something good happens,
+/// \retval BAD_RETURN_CODE otherwise
+fapi::ReturnCode
+p8_ocb_indir_access(const fapi::Target& i_target,
+ uint32_t i_ocb_chan,
+ uint32_t i_ocb_op,
+ uint32_t i_ocb_req_length,
+ ecmdDataBufferBase& io_ocb_buffer,
+ uint32_t& o_ocb_act_length,
+ bool i_oci_address_valid,
+ uint32_t i_oci_address);
+
+
+
+} // extern "C"
+
+#endif // _P8_OCBINDIRACC_H_
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C
new file mode 100644
index 000000000..919e154d9
--- /dev/null
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C
@@ -0,0 +1,82 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: p8_ocb_indir_setup_linear.C,v 1.2 2012/10/10 14:47:19 pchatnah Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_setup_linear.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! OWNER NAME: Jim Yacynych Email: jimyac@us.ibm.com
+// *!
+/// \file p8_ocb_indir_setup_linear.C
+/// \brief Configure OCB Channel for Linear Streaming or Non-streaming mode
+///
+/// High-level procedure flow:
+/// \verbatim
+/// Setup specified channel to linear streaming or non-streaming mode by calling proc proc_ocb_init
+///
+/// Procedure Prereq:
+/// - System clocks are running
+/// \endverbatim
+///
+//------------------------------------------------------------------------------
+
+// ----------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------
+
+#include "p8_pm.H"
+#include "p8_ocb_indir_setup_linear.H"
+
+extern "C" {
+
+using namespace fapi;
+
+// ----------------------------------------------------------------------
+// Function definitions
+// ----------------------------------------------------------------------
+/// \param[in] i_target => Chip Target
+/// \param[in] i_ocb_chan => select channel 0-3 to set up (see p8_ocb_init.H)
+/// \param[in] i_ocb_type => linear streaming or non-streaming (see p8_ocb_init.H)
+/// \param[in] i_ocb_bar => 32-bit channel base address (29 bits + "000")
+/// \retval FAPI_RC_SUCCESS
+/// \retval ERROR defined in xml for p8_ocb_init
+
+ReturnCode
+p8_ocb_indir_setup_linear(const Target& i_target, uint8_t i_ocb_chan, uint8_t i_ocb_type, uint32_t i_ocb_bar)
+{
+ ReturnCode rc;
+
+ FAPI_INF("Executing p8_ocb_indir_setup_linear for channel %x as type %x to address 0x%x\n", i_ocb_chan, i_ocb_type, i_ocb_bar);
+
+ FAPI_EXEC_HWP(rc, p8_ocb_init, i_target, PM_SETUP_PIB, i_ocb_chan, i_ocb_type, i_ocb_bar, 0, OCB_Q_ITPTYPE_NULL, OCB_Q_ITPTYPE_NULL);
+ if (!rc.ok()) {
+ FAPI_ERR("Error calling proc_ocb_init from p8_ocb_indir_setup_linear. \n");
+ return rc;
+ }
+
+ return rc;
+}
+
+} //end extern C
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H
new file mode 100644
index 000000000..5697ecebb
--- /dev/null
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H
@@ -0,0 +1,56 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/occ/occ_procedures/p8_ocb_indir_setup_linear.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: p8_ocb_indir_setup_linear.H,v 1.3 2012/11/30 00:06:44 jimyac Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_ocb_indir_setup_linear.H,v $
+#ifndef _P8_OCB_INDIR_SETUP_LINEAR_H_
+#define _P8_OCB_INDIR_SETUP_LINEAR_H_
+
+#include <fapi.H>
+#include "p8_pm.H"
+#include "p8_ocb_init.H"
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode (*p8_ocb_indir_setup_linear_FP_t) (const fapi::Target&,
+ const uint8_t,
+ const uint8_t,
+ const uint32_t);
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function prototype
+//------------------------------------------------------------------------------
+/// \brief Configure OCB Channel for Linear Streaming or Non-streaming mode
+/// \param[in] i_target => Chip Target
+/// \param[in] i_ocb_chan => select channel 0-3 to set up (see p8_ocb_init.H)
+/// \param[in] i_ocb_type => linear streaming or non-streaming (see p8_ocb_init.H)
+/// \param[in] i_ocb_bar => 32-bit channel base address (29 bits + "000")
+
+fapi::ReturnCode p8_ocb_indir_setup_linear(const fapi::Target& i_target,
+ const uint8_t i_ocb_chan,
+ const uint8_t i_ocb_type,
+ const uint32_t i_ocb_bar);
+
+} // extern "C"
+
+#endif
diff --git a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
index 650ca56af..a7feb71ff 100644
--- a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
+++ b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml
@@ -506,4 +506,29 @@
</chip>
</chipEcFeature>
</attribute>
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_CFAM_RESET_SBE_START_WA</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ True if:
+ Murano EC less than 0x20
+ Venice EC less than 0x20
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_MURANO</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ <chip>
+ <name>ENUM_ATTR_NAME_VENICE</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
</attributes>
diff --git a/src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml b/src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml
new file mode 100644
index 000000000..e649e78f2
--- /dev/null
+++ b/src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml
@@ -0,0 +1,67 @@
+<!-- IBM_PROLOG_BEGIN_TAG -->
+<!-- This is an automatically generated prolog. -->
+<!-- -->
+<!-- $Source: src/usr/hwpf/hwp/runtime_errors/proc_ocb_indir_access_errors.xml $ -->
+<!-- -->
+<!-- IBM CONFIDENTIAL -->
+<!-- -->
+<!-- COPYRIGHT International Business Machines Corp. 2013 -->
+<!-- -->
+<!-- p1 -->
+<!-- -->
+<!-- Object Code Only (OCO) source materials -->
+<!-- Licensed Internal Code Source Materials -->
+<!-- IBM HostBoot Licensed Internal Code -->
+<!-- -->
+<!-- The source code for this program is not published or otherwise -->
+<!-- divested of its trade secrets, irrespective of what has been -->
+<!-- deposited with the U.S. Copyright Office. -->
+<!-- -->
+<!-- Origin: 30 -->
+<!-- -->
+<!-- IBM_PROLOG_END_TAG -->
+<!-- Error definitions for proc_ocb_indir_access procedure -->
+<hwpErrors>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_ACCESS_PUT_SCOM</rc>
+ <description>Put to OCB indirect channel failed</description>
+ </hwpError>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_ACCESS_GET_SCOM</rc>
+ <description>Get from OCB indirect channel failed.</description>
+ </hwpError>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_ACCESS_LENGTH_CHECK</rc>
+ <description>Input length of data transfered via indirect channel did not match
+ the output length</description>
+ </hwpError>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_ACCESS_CHANNEL</rc>
+ <description>Invalid OCB indirect channel passed to proc_ocb_indir_access. </description>
+ </hwpError>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_ACCESS_OP</rc>
+ <description>Invalid OCB indirect operation to proc_ocb_indir_access. </description>
+ </hwpError>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_PUT_DATA_LENGTH_ERROR</rc>
+ <description>No data passed for Put operation. </description>
+ </hwpError> <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_ACCESS_GET_BUFFER</rc>
+ <description>Get of OCB data reg had non-zero response code. </description>
+ </hwpError>
+ <!-- *********************************************************************** -->
+ <hwpError>
+ <rc>RC_PROCPM_OCB_PUT_DATA_POLL_NOT_FULL_ERROR</rc>
+ <description>Indicates that a timeout occured waiting for a push queue to be non-full
+ before writing data. Is likely due to OCC firmware not pulling entries off of the
+ queue in a timely manner. </description>
+ </hwpError>
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/slave_sbe/makefile b/src/usr/hwpf/hwp/slave_sbe/makefile
index a51963441..c18022cac 100644
--- a/src/usr/hwpf/hwp/slave_sbe/makefile
+++ b/src/usr/hwpf/hwp/slave_sbe/makefile
@@ -40,6 +40,8 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_revert_sbe_mcs_setup
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_getecid
EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/proc_mailbox_utils
## NOTE: add new object files when you add a new HWP
@@ -49,13 +51,16 @@ OBJS = slave_sbe.o \
proc_extract_sbe_rc.o \
proc_read_seeprom.o \
proc_getecid.o \
- proc_cen_ref_clk_enable.o
+ proc_cen_ref_clk_enable.o \
+ proc_spless_sbe_startWA.o
## NOTE: add a new directory onto the vpaths when you add a new HWP
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_revert_sbe_mcs_setup
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete
VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_getecid
+VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA
+
include ${ROOTPATH}/config.mk
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.C b/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.C
new file mode 100644
index 000000000..c00f82c19
--- /dev/null
+++ b/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.C
@@ -0,0 +1,162 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// -*- mode: C++; c-file-style: "linux"; -*-
+
+// $Id: proc_spless_sbe_startWA.C,v 1.2 2013/08/14 20:44:47 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_cen_ref_clk_enable.C,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2013
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : proc_spless_sbe_startWA.C
+// *! DESCRIPTION : Issue workaround for CFAM Reset SBE start (FAPI)
+// *!
+// *! OWNER NAME : Benedikt Geukes Email: benedikt.geukes@de.ibm.com
+// *! BACKUP NAME : Ralph Koester Email: rkoester@de.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include "proc_spless_sbe_startWA.H"
+#include "p8_scom_addresses.H"
+#include "proc_mailbox_utils.H"
+
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+
+//------------------------------------------------------------------------------
+// Hardware Procedure
+//------------------------------------------------------------------------------
+// parameters: i_target => chip target (S1/P8)
+// returns: FAPI_RC_SUCCESS if operation was successful, else error
+//------------------------------------------------------------------------------
+fapi::ReturnCode proc_spless_sbe_startWA(const fapi::Target & i_target)
+{
+
+ uint32_t rc_ecmd = 0;
+ fapi::ReturnCode rc;
+ uint32_t l_set_data;
+ ecmdDataBufferBase set_data(32);
+ uint8_t l_needSbeStartWA = 0;
+
+ do {
+
+ // ---- check if workaround is needed
+ rc = FAPI_ATTR_GET(ATTR_CHIP_EC_FEATURE_CFAM_RESET_SBE_START_WA,
+ &i_target,
+ l_needSbeStartWA);
+ if(rc)
+ {
+ FAPI_ERR("Error querying Chip EC feature: "
+ "ATTR_CHIP_EC_FEATURE_CFAM_RESET_SBE_START_WA");
+ break;
+ }
+
+ if(!l_needSbeStartWA)
+ {
+ //Workaround not needed -- break
+ break;
+ }
+
+ // -----------------------------------------------------------
+ //Need to set the I2C speed based in the mailbox reg
+ //Since not all 1.x part have the correctly programmed OTPROM
+ rc = proc_mailbox_utils_get_mbox2( i_target, l_set_data );
+ if (rc)
+ {
+ FAPI_ERR("ERROR: get_mbox2 = 0x%08x",
+ static_cast<uint32_t>(rc) );
+ break;
+ }
+
+ rc_ecmd |= set_data.setWord( 0, l_set_data );
+
+ FAPI_INF( "Write 0x%08x to mbox scratch 2",
+ set_data.getWord(0) );
+
+ // write it to mbox scratch2
+ rc = fapiPutCfamRegister( i_target,
+ MBOX_SCRATCH_REG1_0x00002839,
+ set_data );
+ if (rc)
+ {
+ FAPI_ERR("ERROR: write MBOX_SCRATCH_REG1_0x00002839= 0x%08x",
+ static_cast<uint32_t>(rc) );
+ break;
+ }
+
+ // ------------------------------------------------
+ // Now toggle Warmstart bit to circumvent HW254584
+ // write it to mbox scratch2
+ rc_ecmd |= set_data.setWord( 0, 0x10000000 );
+
+
+ rc = fapiPutCfamRegister( i_target,
+ CFAM_FSI_SBE_VITAL_0x0000281C,
+ set_data );
+ if (rc)
+ {
+ FAPI_ERR("ERROR: write CFAM_FSI_SBE_VITAL_0x0000281C= 0x%08x",
+ static_cast<uint32_t>(rc) );
+ break;
+ }
+
+ rc_ecmd |= set_data.setWord( 0, 0x90000000 );
+
+
+ rc = fapiPutCfamRegister( i_target,
+ CFAM_FSI_SBE_VITAL_0x0000281C,
+ set_data );
+ if (rc)
+ {
+ FAPI_ERR("ERROR: write CFAM_FSI_SBE_VITAL_0x0000281C= 0x%08x",
+ static_cast<uint32_t>(rc) );
+ break;
+ }
+
+ if(rc_ecmd)
+ {
+ FAPI_ERR( "Error (0x%08x) writing value to set_data",
+ rc_ecmd);
+ rc.setEcmdError(rc_ecmd);
+ break;
+ }
+ } while(0); // end do
+
+ // mark function exit
+ FAPI_INF("proc_spless_sbe_startWA: Exit");
+ return rc;
+} // end FAPI procedure proc_spless_sbe_startWA
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.H b/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.H
new file mode 100644
index 000000000..bc30c8435
--- /dev/null
+++ b/src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.H
@@ -0,0 +1,83 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/hwpf/hwp/slave_sbe/proc_spless_sbe_startWA/proc_spless_sbe_startWA.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* COPYRIGHT International Business Machines Corp. 2013 */
+/* */
+/* p1 */
+/* */
+/* Object Code Only (OCO) source materials */
+/* Licensed Internal Code Source Materials */
+/* IBM HostBoot Licensed Internal Code */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* Origin: 30 */
+/* */
+/* IBM_PROLOG_END_TAG */
+// $Id: proc_spless_sbe_startWA.H,v 1.1 2013/08/12 18:19:30 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_cen_ref_clk_enable.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2013
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE : proc_spless_sbe_startWA.C
+// *! DESCRIPTION : Issue workaround for CFAM Reset SBE start (FAPI)
+// *!
+// *! OWNER NAME : Benedikt Geukes Email: benedikt.geukes@de.ibm.com
+// *! BACKUP NAME : Ralph Koester Email: rkoester@de.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef _PROC_SPLESS_SBE_STARTWA_H_
+#define _PROC_SPLESS_SBE_STARTWA_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+#include <fapi.H>
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode (*proc_spless_sbe_startWA_FP_t)(const fapi::Target &);
+
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+
+extern "C"
+{
+
+/**
+ * @brief Issue workaround for SPless slave chips (ie started by CFAM Reset)
+ * Note this only applies to DD1.x parts (both murano/venice)
+ * The master chip is started by the FPGA, but the slaves need to be
+ * started by Hostboot
+ *
+ * @param[in] i_target chip target
+ *
+ * @return ReturnCode
+ */
+ fapi::ReturnCode proc_spless_sbe_startWA(const fapi::Target & i_target);
+
+} // extern "C"
+
+#endif // _PROC_SPLESS_SBE_STARTWA_H_
diff --git a/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C b/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C
index 859a96389..6a114107f 100644
--- a/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C
+++ b/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C
@@ -38,6 +38,8 @@
#include <initservice/taskargs.H>
#include <errl/errlentry.H>
#include <initservice/isteps_trace.H>
+#include <initservice/initserviceif.H>
+#include <sys/time.h>
// targeting support
#include <targeting/common/commontargeting.H>
@@ -52,11 +54,13 @@
#include <fapi.H>
#include <fapiPlatHwpInvoker.H>
-#include "proc_cen_ref_clk_enable/proc_cen_ref_clk_enable.H"
+#include "proc_cen_ref_clk_enable.H"
#include "slave_sbe.H"
-#include "proc_revert_sbe_mcs_setup/proc_revert_sbe_mcs_setup.H"
+#include "proc_revert_sbe_mcs_setup.H"
#include "proc_check_slave_sbe_seeprom_complete.H"
#include "proc_getecid.H"
+#include "proc_spless_sbe_startWA.H"
+
using namespace ISTEP;
using namespace ISTEP_ERROR;
@@ -157,11 +161,113 @@ void* call_host_slave_sbe_config(void *io_pArgs)
//******************************************************************************
void* call_host_sbe_start( void *io_pArgs )
{
+ errlHndl_t l_errl = NULL;
IStepError l_stepError;
+ bool l_needDelay = false;
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_sbe_start entry" );
- // call proc_sbe_start.C
+ //
+ // get the master Proc target, we want to IGNORE this one.
+ //
+ TARGETING::Target* l_pMasterProcTarget = NULL;
+ TARGETING::targetService().masterProcChipTargetHandle(l_pMasterProcTarget);
+
+ //
+ // get a list of all the procs in the system
+ //
+ TARGETING::TargetHandleList l_procTargetList;
+ getAllChips(l_procTargetList, TYPE_PROC);
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "host_sbe_start: %d procs in the system.",
+ l_procTargetList.size() );
+
+ // loop thru all the cpu's
+ for (TargetHandleList::const_iterator
+ l_proc_iter = l_procTargetList.begin();
+ l_proc_iter != l_procTargetList.end();
+ ++l_proc_iter)
+ {
+ // make a local copy of the Processor target
+ TARGETING::Target* l_pProcTarget = *l_proc_iter;
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "target HUID %.8X",
+ TARGETING::get_huid(l_pProcTarget));
+
+ fapi::Target l_fapiProcTarget( fapi::TARGET_TYPE_PROC_CHIP,
+ l_pProcTarget );
+
+
+ if (l_pProcTarget == l_pMasterProcTarget )
+ {
+ // we are just checking the Slave SBE's, skip the master
+ continue;
+ }
+ else if (INITSERVICE::spLess())
+ {
+ //Need to issue SBE start workaround on all slave chips
+ // Invoke the HWP
+ FAPI_INVOKE_HWP(l_errl,
+ proc_spless_sbe_startWA,
+ l_fapiProcTarget);
+
+ l_needDelay = true;
+ }
+ else
+ {
+ //Eventually for secureboot will need to kick off
+ //SBE here (different HWP), but for now not needed
+ //so do nothing
+ }
+
+ if (l_errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR : sbe_start",
+ "failed, returning errorlog" );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pProcTarget).addToLog( l_errl );
+
+ /*@
+ * @errortype
+ * @reasoncode ISTEP_SLAVE_SBE_FAILED
+ * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
+ * @moduleid ISTEP_PROC_SBE_START
+ * @userdata1 bytes 0-1: plid identifying first error
+ * bytes 2-3: reason code of first error
+ * @userdata2 bytes 0-1: total number of elogs included
+ * bytes 2-3: N/A
+ * @devdesc call to HWP to start SBE
+ * returned an error
+ *
+ */
+ l_stepError.addErrorDetails(
+ ISTEP_SLAVE_SBE_FAILED,
+ ISTEP_PROC_SBE_START,
+ l_errl );
+
+ errlCommit( l_errl, HWPF_COMP_ID );
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : sbe_start",
+ "completed ok");
+
+ }
+ } // endfor
+
+ //TODO RTC 87845 Should really move this delay to
+ // check_slave_sbe_seeprom_complete to delay/poll instead
+ // of one big delay here. For now if we started the slaves
+ // delay ~2.5 sec for them to complete
+ if(l_needDelay)
+ {
+ nanosleep( 2, 500000000 ); //sleep for 2.5 seconds
+ }
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_sbe_start exit" );
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index c1335babc..422262f1e 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -74,6 +74,7 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml \
hwp/runtime_errors/proc_cpu_special_wakeup_errors.xml \
hwp/runtime_errors/p8_poregpe_errors.xml \
hwp/runtime_errors/p8_pba_init_errors.xml \
+ hwp/runtime_errors/proc_ocb_indir_access_errors.xml \
hwp/dram_initialization/host_mpipl_service/proc_mpipl_chip_cleanup_errors.xml \
hwp/build_winkle_images/p8_set_pore_bar/p8_pfet_init_errors.xml \
hwp/poreve_errors.xml \
OpenPOWER on IntegriCloud