diff options
| author | Thi Tran <thi@us.ibm.com> | 2013-10-07 20:42:33 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-10-09 19:18:24 -0500 |
| commit | 2ffd66d3fe29208a1a08dac4ef7f21c51198f3e5 (patch) | |
| tree | c6e77db1de13df66ee55565483cbb41d47a02624 /src | |
| parent | 29c238d3c9ab3e2e7680ab935a550b0909abaad7 (diff) | |
| download | blackbird-hostboot-2ffd66d3fe29208a1a08dac4ef7f21c51198f3e5.tar.gz blackbird-hostboot-2ffd66d3fe29208a1a08dac4ef7f21c51198f3e5.zip | |
INITPROC: Hostboot - from defect SW226528 Week 9/24
Change-Id: I0b03d4b8a21db1ab0802bd30a958c15f404ed3c7
CQ:SW226528
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6545
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
19 files changed, 539 insertions, 193 deletions
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C index 8ad158544..676a5043b 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_image_help.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_image_help.C,v 1.55 2013/04/01 21:32:16 cmolsen Exp $ +// $Id: p8_image_help.C,v 1.58 2013/10/07 14:29:08 jeshua Exp $ // /*------------------------------------------------------------------------------*/ /* *! TITLE : p8_image_help.C */ @@ -124,13 +124,13 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s uint32_t **o_wfInline, // location of the PORE instructions data stream uint32_t *o_wfInlineLenInWords, // final length of data stream uint8_t i_flushOptimization, // flush optimize or not - uint32_t i_scanMaxRotate, // Max rotate bit len on 38xxx, or polling threshold on 39xxx. + uint32_t i_scanMaxRotate, // Max rotate bit len on 38xxx, or polling threshold on 39xxx. uint32_t i_waitsScanDelay) // Temporary debug support. { uint32_t rc=0; uint32_t i=0; uint32_t scanSelectAddr=0; - uint32_t scanRing_baseAddr=0, __attribute__((unused)) scanRing_baseAddr_long=0; // HACK + uint32_t scanRing_baseAddr=0; uint32_t scanRing_poreAddr=0; uint32_t scanRingCheckWord=0; uint32_t bitShift=0; @@ -158,8 +158,11 @@ int create_wiggle_flip_prg( uint32_t *i_deltaRing, // scan ring delta s // Short: 0x00038000: port 3, addr bit 16 must be set to 1 and bit 19 to 0. scanRing_baseAddr = P8_PORE_SHIFT_REG; scanRing_poreAddr = scanRing_baseAddr; + +#ifdef IMGBUILD_PPD_WF_POLLING_PROT // Long (poll): 0x00039000: port 3, addr bit 16 must be set to 1 and bit 19 to 1. - scanRing_baseAddr_long = P8_PORE_SHIFT_REG | 0x00001000; + uint32_t scanRing_baseAddr_long = P8_PORE_SHIFT_REG | 0x00001000; +#endif // Header check word for checking ring write was successful scanRingCheckWord = P8_SCAN_CHECK_WORD; @@ -1568,27 +1571,31 @@ int write_vpd_ring_to_ipl_image(void *io_image, else idxVector = 0; - // Write ring block to image. - sbe_xip_image_size( io_image, &sizeImage); - rc = write_ring_block_to_image(io_image, - i_ringName, - bufRs4RingBlock, - idxVector, - 0, - 0, - io_sizeImageOut, - i_xipSectionId, - (void*)i_bufRs4Ring, // Reuse buffer as temp work buf. - i_sizeBufTmp); - if (rc) { - MY_ERR("write_ring_block_to_image() failed w/rc=%i \n",rc); - MY_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code. \n"); - MY_ERR("Ring name: %s\n ", i_ringName); - MY_ERR("Size of image before wrbti() call: %i\n ", sizeImage); - MY_ERR("Size of ring block being added: %i\n ", sizeRs4RingBlock); - MY_ERR("Max size of image allowed: %i\n ", io_sizeImageOut); - return IMGBUILD_ERR_RING_WRITE_TO_IMAGE; - } + // Write ring block to image. + sbe_xip_image_size( io_image, &sizeImage); + rc = write_ring_block_to_image(io_image, + i_ringName, + bufRs4RingBlock, + idxVector, + 0, + 0, + io_sizeImageOut, + i_xipSectionId, + (void*)i_bufRs4Ring, // Reuse buffer as temp work buf. + i_sizeBufTmp); + if (rc) { + MY_ERR("write_ring_block_to_image() failed w/rc=%i \n",rc); + MY_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code. \n"); + MY_ERR("Ring name: %s\n ", i_ringName); + MY_ERR("Size of image before wrbti() call: %i\n ", sizeImage); + MY_ERR("Size of ring block being added: %i\n ", sizeRs4RingBlock); + MY_ERR("Max size of image allowed: %i\n ", io_sizeImageOut); + if (rc==SBE_XIP_WOULD_OVERFLOW) { + return rc; + } else { + return IMGBUILD_ERR_RING_WRITE_TO_IMAGE; + } + } MY_INF("\tSuccessful IPL image update; \n"); @@ -1757,27 +1764,31 @@ int write_vpd_ring_to_slw_image(void *io_image, else idxVector = 0; - // Write ring block to image. - sbe_xip_image_size( io_image, &sizeImage); - rc = write_ring_block_to_image(io_image, - i_ringName, - bufWfRingBlock, - idxVector, - 0, - 0, - io_sizeImageOut, - SBE_XIP_SECTION_RINGS, - (void*)i_bufRs4Ring, // Reuse buffer as temp work buf. - i_sizeBufTmp); - if (rc) { - MY_ERR("write_ring_block_to_image() failed w/rc=%i; \n",rc); - MY_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code; \n"); - MY_ERR("Ring name: %s\n ", i_ringName); - MY_ERR("Size of image before wrbti() call: %i\n ", sizeImage); - MY_ERR("Size of ring block being added: %i\n ", sizeWfRingBlock); - MY_ERR("Max size of image allowed: %i\n ", io_sizeImageOut); - return IMGBUILD_ERR_RING_WRITE_TO_IMAGE; - } + // Write ring block to image. + sbe_xip_image_size( io_image, &sizeImage); + rc = write_ring_block_to_image(io_image, + i_ringName, + bufWfRingBlock, + idxVector, + 0, + 0, + io_sizeImageOut, + SBE_XIP_SECTION_RINGS, + (void*)i_bufRs4Ring, // Reuse buffer as temp work buf. + i_sizeBufTmp); + if (rc) { + MY_ERR("write_ring_block_to_image() failed w/rc=%i; \n",rc); + MY_ERR("Check p8_delta_scan_rw.h for meaning of IMGBUILD_xyz rc code; \n"); + MY_ERR("Ring name: %s\n ", i_ringName); + MY_ERR("Size of image before wrbti() call: %i\n ", sizeImage); + MY_ERR("Size of ring block being added: %i\n ", sizeWfRingBlock); + MY_ERR("Max size of image allowed: %i\n ", io_sizeImageOut); + if (rc==SBE_XIP_WOULD_OVERFLOW) { + return rc; + } else { + return IMGBUILD_ERR_RING_WRITE_TO_IMAGE; + } + } MY_INF("Successful SLW image update; \n"); @@ -1901,37 +1912,79 @@ int check_and_perform_ring_datacare( void *i_imageRef, return IMGBUILD_ERR_DATACARE_RING_MESS; } - // Overlay io_buf2 bits according to care and data bits in io_buf1 - uint32_t iWord, remBits32; - uint32_t dataVpd, dataDc, careDc, careDc1, careDc2; - - // Split apart the raw datacare ring into data (1st part) and care (2nd part). - // Note that the order is already in BE for both Datacare and Mvpd rings. - // Further note that the care part is fractured into two words that need to - // be combined into a single word. (That's the black magic part below). - remBits32 = ringBitLen - (ringBitLen/32)*32; - for (iWord=0; iWord<(ringBitLen+31)/32; iWord++) { - dataDc = *((uint32_t*)io_buf1 + iWord); // Data part - // Split off the care part, do BE->LE, shift the two parts propoerly, and finally do - // LE->BE again. It's f*kin' black magic... - careDc1 = myRev32(*((uint32_t*)io_buf1 + ringBitLen/32 + iWord)); // Care part a - careDc2 = myRev32(*((uint32_t*)io_buf1 + ringBitLen/32 + 1 + iWord)); // Care part b - careDc = myRev32(careDc1<<remBits32 | careDc2>>(32-remBits32)); - dataVpd = *((uint32_t*)io_buf2 + iWord); - MY_DBG("data: %08x iWord=%i\n",dataDc,iWord); - MY_DBG("care: %08x\n",careDc); - MY_DBG("orig: %08x\n",dataVpd); - dataVpd = ( dataVpd & ~careDc ) | dataDc; - MY_DBG("new: %08x\n",dataVpd); - *((uint32_t*)io_buf2 + iWord) = dataVpd; - // Check for data+care construction. I.e., a 1-bit in data is illegal if corresponding - // care bit is a 0-bit. - if ((dataDc & ~careDc)!=0) { - MY_ERR("DataCare ring construction error:\n"); - MY_ERR("A data bit (in word i=%i) is set but the care bit is not set.\n",iWord); - return IMGBUILD_ERR_DATACARE_RING_MESS; - } - } + // Overlay io_buf2 bits according to care and data bits in io_buf1 + + // Split apart the raw datacare ring into data (1st part) and care (2nd part). + // Note that the order is already in BE for both Datacare and Mvpd rings. + // Further note that the care part is fractured into two words that need to + // be combined into a single word. (That's the black magic part below). + // Once there are less than two words left to process, care part will be + // less than two words from the buffer end, so go byte-by-byte at that point + uint32_t dataVpd, dataDc, careDc, careDc1, careDc2; + int32_t remBits = ringBitLen; + uint32_t * pDataWord = (uint32_t*)io_buf1; + uint32_t * pCareWord = (uint32_t*)io_buf1 + (ringBitLen/32); + uint32_t * pDataVPD = (uint32_t*)io_buf2; + uint32_t careLeftShift = ringBitLen%32; + uint32_t careRightShift = 32-careLeftShift; + while (remBits > 64) { + dataDc = *pDataWord++; // Data part + // Split off the care part, do BE->LE, shift the two parts properly, and finally do + // LE->BE again. It's f*kin' black magic... + careDc1 = myRev32(*pCareWord++); // Care part a + careDc2 = myRev32(*pCareWord); // Care part b + careDc = myRev32(careDc1<<careLeftShift | careDc2>>careRightShift); + dataVpd = *(pDataVPD); + MY_DBG("data: %08x remBits=%i\n",dataDc,remBits); + MY_DBG("care: %08x\n",careDc); + MY_DBG("orig: %08x\n",dataVpd); + dataVpd = ( dataVpd & ~careDc ) | dataDc; + MY_DBG("new: %08x\n",dataVpd); + *pDataVPD++ = dataVpd; + // Check for data+care construction. I.e., a 1-bit in data is illegal if corresponding + // care bit is a 0-bit. + if ((dataDc & ~careDc)!=0) { + MY_ERR("DataCare ring construction error:\n"); + MY_ERR("A data bit (in word i=%i) is set but the care bit is not set.\n", + (ringBitLen-remBits)/32); + return IMGBUILD_ERR_DATACARE_RING_MESS; + } + remBits-=32; + } + //Less than 64 bits left, so must do byte-by-byte modifications + uint8_t dataVpdByte, dataDcByte, careDcByte, careDc1Byte, careDc2Byte; + uint8_t * pDataByte = (uint8_t*)pDataWord; + uint8_t * pCareByte = (uint8_t*)pCareWord; + uint8_t * pDataVPDByte = (uint8_t*)pDataVPD; + careLeftShift = ringBitLen%8; + careRightShift = 8-careLeftShift; + while(remBits > 0) { + dataDcByte = *pDataByte++; // Data part + // Split off the care part and shift the two parts propoerly + careDc1Byte = *pCareByte++; // Care part a + if(remBits > 8) { + careDc2Byte = *pCareByte; // Care part b + careDcByte = ((careDc1Byte<<careLeftShift) | (careDc2Byte>>careRightShift)); + } else { + careDcByte = careDc1Byte << careLeftShift; // There is no part b + } + dataVpdByte = *(pDataVPDByte); + MY_DBG("data: %02x remBits=%i\n",dataDcByte,remBits); + MY_DBG("care: %02x\n",careDcByte); + MY_DBG("orig: %02x\n",dataVpdByte); + dataVpdByte = ( dataVpdByte & ~careDcByte ) | dataDcByte; + MY_DBG("new: %02x\n",dataVpdByte); + *pDataVPDByte++ = dataVpdByte; + // Check for data+care construction. I.e., a 1-bit in data is illegal if corresponding + // care bit is a 0-bit. + if ((dataDcByte & ~careDcByte)!=0) { + MY_ERR("DataCare ring construction error:\n"); + MY_ERR("A data bit (in byte i=%i) is set but the care bit is not set.\n", + (ringBitLen-remBits)/8); + return IMGBUILD_ERR_DATACARE_RING_MESS; + } + remBits-=8; + } // Compress overlayed Mvpd ring. rc = _rs4_compress( (CompressedScanData*)io_buf1, diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api_fixed.C b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api_fixed.C index 2f7d44778..df9f260a0 100644 --- a/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api_fixed.C +++ b/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build/p8_pore_table_gen_api_fixed.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_pore_table_gen_api_fixed.C,v 1.9 2013/05/29 18:58:28 cmolsen Exp $ +// $Id: p8_pore_table_gen_api_fixed.C,v 1.10 2013/09/16 17:55:05 cmolsen Exp $ // /*------------------------------------------------------------------------------*/ /* *! (C) Copyright International Business Machines Corp. 2012 */ @@ -116,19 +116,17 @@ uint32_t p8_pore_gen_cpureg_fixed( void *io_image, rcLoc = 0; // ------------------------------------------------------------------------- - // Get pointer to SLW section where Ram table resides - // NB! Only needed for modeBuild==2 ! + // Check slw section location and size. (Mainly needed for fixed image.) // if (i_modeBuild==P8_SLW_MODEBUILD_IPL || i_modeBuild==P8_SLW_MODEBUILD_REBUILD) { // Fixed image. - // CMO-20130114: Remove this asap. Only for fixed img transition. - Begin - // hostSlwSectionFixed isn't needed for modeBuild=0,1 ! hostSlwSectionFixed = (void*)( (uintptr_t)io_image + FIXED_SLW_IMAGE_SIZE - FIXED_FFDC_SECTION_SIZE - FIXED_SLW_SECTION_SIZE ); - // We may want to continue calling this because it would be practical to - // crosscheck the section size. Though, the offset is NOT reliable ! + // Even though we shouldn't call this api during a rebuild, it should be + // safe to do so in this particular case since none of the info requested + // is supposed to be moved during a rebuild. rc = sbe_xip_get_section( io_image, SBE_XIP_SECTION_SLW, &xipSection); if (rc) { MY_ERR("Probably invalid section name for SBE_XIP_SECTION_SLW.\n"); @@ -136,13 +134,12 @@ uint32_t p8_pore_gen_cpureg_fixed( void *io_image, } hostSlwRamSection = (void*)((uintptr_t)io_image + xipSection.iv_offset); if (hostSlwSectionFixed!=hostSlwRamSection) { - MY_DBG("hostSlwSectionFixed != hostSlwRamSection(from image).\n"); + MY_ERR("hostSlwSectionFixed != hostSlwRamSection(from image api).\n"); + return IMGBUILD_ERR_RAM_HDRS_NOT_SYNCED; } else { - MY_DBG("hostSlwSectionFixed == hostSlwRamSection(from image).\n"); + MY_DBG("hostSlwSectionFixed == hostSlwRamSection(from image api).\n"); } - hostSlwRamSection = hostSlwSectionFixed; - // CMO-20130114: Remove this asap. Only for fixed img transition. - End } else { // SRAM non-fixed image. rc = sbe_xip_get_section( io_image, SBE_XIP_SECTION_SLW, &xipSection); @@ -388,19 +385,17 @@ uint32_t p8_pore_gen_scom_fixed( void *io_image, rcLoc = 0; // ------------------------------------------------------------------------- - // Get pointer to SLW section where Scom table resides - // NB! Only needed for modeBuild==2 ! + // Check slw section location and size. (Mainly needed for fixed image.) // if (i_modeBuild==P8_SLW_MODEBUILD_IPL || i_modeBuild==P8_SLW_MODEBUILD_REBUILD) { // Fixed image. - // CMO-20130114: Remove this asap. Only for fixed img transition. - Begin - // hostSlwSectionFixed isn't needed for modeBuild=0,1 ! hostSlwSectionFixed = (void*)( (uintptr_t)io_image + FIXED_SLW_IMAGE_SIZE - FIXED_FFDC_SECTION_SIZE - FIXED_SLW_SECTION_SIZE ); - // We may want to continue calling this because it would be practical to - // crosscheck the section size. Though, the offset is NOT reliable ! + // Even though we shouldn't call this api during a rebuild, it should be + // safe to do so in this particular case since none of the info requested + // is supposed to be moved during a rebuild. rc = sbe_xip_get_section( io_image, SBE_XIP_SECTION_SLW, &xipSection); if (rc) { MY_ERR("Probably invalid section name for SBE_XIP_SECTION_SLW.\n"); @@ -408,13 +403,12 @@ uint32_t p8_pore_gen_scom_fixed( void *io_image, } hostSlwSection = (void*)((uintptr_t)io_image + xipSection.iv_offset); if (hostSlwSectionFixed!=hostSlwSection) { - MY_DBG("hostSlwSectionFixed != hostSlwSection(from image).\n"); + MY_ERR("hostSlwSectionFixed != hostSlwSection(from image api).\n"); + return IMGBUILD_ERR_SCOM_HDRS_NOT_SYNCD; } else { - MY_DBG("hostSlwSectionFixed == hostSlwSection(from image).\n"); + MY_DBG("hostSlwSectionFixed == hostSlwSection(from image api).\n"); } - hostSlwSection = hostSlwSectionFixed; - // CMO-20130114: Remove this asap. Only for fixed img transition. - End } else { // SRAM non-fixed image. rc = sbe_xip_get_section( io_image, SBE_XIP_SECTION_SLW, &xipSection); diff --git a/src/usr/hwpf/hwp/bus_training/io_read_erepair.C b/src/usr/hwpf/hwp/bus_training/io_read_erepair.C index 3d3707902..08218cfff 100644 --- a/src/usr/hwpf/hwp/bus_training/io_read_erepair.C +++ b/src/usr/hwpf/hwp/bus_training/io_read_erepair.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/usr/hwpf/hwp/io_read_erepair/io_read_erepair.C $ */ +/* $Source: src/usr/hwpf/hwp/bus_training/io_read_erepair.C $ */ /* */ /* IBM CONFIDENTIAL */ /* */ @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: io_read_erepair.C,v 1.5 2013/02/05 06:06:06 varkeykv Exp $ +// $Id: io_read_erepair.C,v 1.6 2013/07/14 15:50:02 varkeykv Exp $ // *!*************************************************************************** // *! (C) Copyright International Business Machines Corp. 1997, 1998 // *! All Rights Reserved -- Property of IBM @@ -63,7 +63,7 @@ ReturnCode io_read_erepair(const Target& target,std::vector<uint8_t> &rx_lanes) ecmdDataBufferBase data_one(16); ecmdDataBufferBase data_two(16); ecmdDataBufferBase mask(16); - uint8_t lane; + uint8_t lane=0; io_interface_t interface=CP_IOMC0_P0; // Since G uint32_t rc_ecmd=0; @@ -108,18 +108,20 @@ ReturnCode io_read_erepair(const Target& target,std::vector<uint8_t> &rx_lanes) for(uint8_t clock_group=start_group;clock_group<=end_group;++clock_group){ // This is only for X bus ..where multi groups are translated to consecutive lane numbers - if(clock_group==0){ - lane=0; - } - else if(clock_group==1){ - lane=20; - } - else if(clock_group==2){ - lane=40; - } - else if(clock_group==3){ - lane=60; - } + if(interface==CP_FABRIC_X0){ + if(clock_group==0){ + lane=0; + } + else if(clock_group==1){ + lane=20; + } + else if(clock_group==2){ + lane=40; + } + else if(clock_group==3){ + lane=60; + } + } //Collect the RX bad lanes rc_ecmd|=data_one.flushTo0(); diff --git a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C index cfa7f462f..45a474897 100644 --- a/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C +++ b/src/usr/hwpf/hwp/core_activate/proc_prep_master_winkle/proc_prep_master_winkle.C @@ -21,7 +21,7 @@ /* */ /* IBM_PROLOG_END_TAG */ // -*- mode: C++; c-file-style: "linux"; -*- -// $Id: proc_prep_master_winkle.C,v 1.12 2013/07/01 18:41:34 stillgs Exp $ +// $Id: proc_prep_master_winkle.C,v 1.13 2013/07/30 15:23:25 jeshua Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_prep_master_winkle.C,v $ //------------------------------------------------------------------------------ // *| @@ -83,7 +83,7 @@ extern "C" // returns: FAPI_RC_SUCCESS if operation was successful, else error //------------------------------------------------------------------------------ fapi::ReturnCode proc_prep_master_winkle(const fapi::Target & i_ex_target, - const bool & i_useRealSBE) + const bool & i_useRealSBE = true) { // data buffer to hold register values ecmdDataBufferBase data(64); diff --git a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml b/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml index d6ddd7f69..b8b6d9831 100644 --- a/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml +++ b/src/usr/hwpf/hwp/core_activate/proc_stop_deadman_timer/proc_stop_deadman_timer_errors.xml @@ -20,13 +20,16 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_stop_deadman_timer_errors.xml,v 1.4 2013/04/25 22:04:00 jeshua Exp $ --> +<!-- $Id: proc_stop_deadman_timer_errors.xml,v 1.5 2013/07/29 21:26:25 jeshua Exp $ --> <!-- Error definitions for proc_stop_deadman_timer procedure --> <hwpErrors> <!-- *********************************************************************** --> <hwpError> <rc>RC_PROC_STOP_DEADMAN_TIMER_BAD_ISTEP_NUM</rc> - <description>The SBE is not at the correct istep number</description> + <description> + Procedure: proc_stop_deadman_timer + The SBE is not at the correct istep number to stop the deadman timer + </description> <collectRegisterFfdc> <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id> <id>REG_FFDC_PROC_SBE_REGISTERS</id> @@ -37,7 +40,10 @@ <!-- *********************************************************************** --> <hwpError> <rc>RC_PROC_STOP_DEADMAN_TIMER_BAD_SUBSTEP_NUM</rc> - <description>The SBE is not at the correct substep number</description> + <description> + Procedure: proc_stop_deadman_timer + The SBE is not at the correct substep number to stop the deadman timer + </description> <collectRegisterFfdc> <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id> <id>REG_FFDC_PROC_SBE_REGISTERS</id> diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C index b052e3faa..59df7825a 100644 --- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C +++ b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: cen_mem_pll_initf.C,v 1.5 2013/03/04 17:56:24 mfred Exp $ +// $Id: cen_mem_pll_initf.C,v 1.8 2013/10/02 16:09:38 mfred Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/cen_mem_pll_initf.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2012 @@ -87,6 +87,11 @@ const uint64_t OPCG_REG2_FOR_SETPULSE = 0x0000000000002000ull; const uint64_t OPCG_REG3_FOR_SETPULSE = 0x6000000000000000ull; const uint64_t CLK_REGION_FOR_SETPULSE = 0x0010040000000000ull; +// Pervasive LFIR Register field/bit definitions +const uint8_t PERV_LFIR_SCAN_COLLISION_BIT = 3; + +const bool i_mask_scan_collision = true; +const uint32_t i_chiplet_base_scom_addr = TP_CHIPLET_0x01000000; extern "C" { @@ -113,6 +118,27 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, FAPI_INF("Starting subroutine: cen_load_pll_ring_from_buffer..."); do { + //------------------------------------------- + // Mask Pervasive LFIR + //------------------------------------------ + + if (i_mask_scan_collision) + { + FAPI_DBG("Masking Pervasive LFIR scan collision bit ..."); + rc_ecmd |= scom_data.setBit(PERV_LFIR_SCAN_COLLISION_BIT); + if (rc_ecmd) + { + FAPI_ERR("Error 0x%x setting up ecmd data buffer to set Pervasive LFIR Mask Register.", rc_ecmd); + rc.setEcmdError(rc_ecmd); + break; + } + rc = fapiPutScom(i_target, i_chiplet_base_scom_addr | GENERIC_PERV_LFIR_MASK_OR_0x0004000F, scom_data); + if (!rc.ok()) + { + FAPI_ERR("Error writing Pervasive LFIR Mask OR Register."); + break; + } + } //------------------------------------------- // Set the OPCG to generate the setpulse @@ -195,7 +221,6 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, FAPI_DBG("Loading of the scan ring data for ring tp_pll_bndy is done.\n"); - //------------------------------------------- // Set the OPCG back to a good state //------------------------------------------ @@ -232,6 +257,37 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, } + //------------------------------------------- + // Clear & Unmask Pervasive LFIR + //------------------------------------------ + + if (i_mask_scan_collision) + { + FAPI_DBG("Clearing Pervasive LFIR scan collision bit ..."); + rc_ecmd |= scom_data.flushTo1(); + rc_ecmd |= scom_data.clearBit(PERV_LFIR_SCAN_COLLISION_BIT); + if (rc_ecmd) + { + FAPI_ERR("Error 0x%x setting up ecmd data buffer to clear Pervasive LFIR Register.", rc_ecmd); + rc.setEcmdError(rc_ecmd); + break; + } + rc = fapiPutScom(i_target, i_chiplet_base_scom_addr | GENERIC_PERV_LFIR_AND_0x0004000B, scom_data); + if (!rc.ok()) + { + FAPI_ERR("Error writing Pervasive LFIR AND Register."); + break; + } + + FAPI_DBG("Unmasking Pervasive LFIR scan collision bit ..."); + rc = fapiPutScom(i_target, i_chiplet_base_scom_addr | GENERIC_PERV_LFIR_MASK_AND_0x0004000E, scom_data); + if (!rc.ok()) + { + FAPI_ERR("Error writing Pervasive LFIR Mask And Register."); + break; + } + } + } while(0); FAPI_INF("Finished executing subroutine: cen_load_pll_ring_from_buffer"); @@ -254,6 +310,7 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) uint32_t rc_ecmd = 0; uint8_t is_simulation = 0; uint32_t mss_freq = 0; + uint32_t nest_freq = 0; uint32_t ring_length = 0; uint8_t attrRingData[80]={0}; // Set to 80 bytes to match length in XML file, not actual scan ring length. ecmdDataBufferBase ring_data; @@ -292,36 +349,105 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) FAPI_ERR("Failed to get attribute: ATTR_MSS_FREQ."); break; } + // ATTR_FREQ_PB is a "system" attribute, so use NULL as the target. + rc = FAPI_ATTR_GET( ATTR_FREQ_PB, NULL, nest_freq); + if (rc) + { + FAPI_ERR("Failed to get attribute: ATTR_FREQ_PB."); + break; + } FAPI_DBG("ATTR_IS_SIMULATION attribute is set to : %d.", is_simulation); FAPI_DBG("DDR frequency is set to : %d.", mss_freq); + FAPI_DBG("NEST frequency is set to : %d.", nest_freq); - - - - -// Note to Pete Thomsen .... you need to copy the code below and change the attribute names..... - - // Read the ring length attribute value. - rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_LENGTH, &i_target, ring_length); + // Read in the PLL Ring LENGTH based on the frequency attributes. + if ( is_simulation ) + { + rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_LENGTH, &i_target, ring_length); + } + else if ( nest_freq == 2000 ) + { + switch (mss_freq) { + case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_LENGTH, &i_target, ring_length); break; + case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_LENGTH, &i_target, ring_length); break; + case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_LENGTH, &i_target, ring_length); break; + case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_LENGTH, &i_target, ring_length); break; + default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + } + } + else if ( nest_freq == 2400 ) + { + switch (mss_freq) { + case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_LENGTH, &i_target, ring_length); break; + case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_LENGTH, &i_target, ring_length); break; + case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_LENGTH, &i_target, ring_length); break; + case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_LENGTH, &i_target, ring_length); break; + default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + } + } + else + { + FAPI_ERR("Un-Supported NEST frequency detected: %d.", nest_freq); + FAPI_ERR("NEST frequency of 2000 or 2400 expected."); + break; + } if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_MEMB_TP_BNDY_PLL_LENGTH."); + FAPI_ERR("Failed to get the PLL ring LENGTH attribute."); break; } - FAPI_DBG("ATTR_MEMB_TP_BNDY_PLL_LENGTH attribute is set to : %d.", ring_length); + FAPI_DBG("PLL ring LENGTH attribute is set to : %d.", ring_length); - // Read the ring data attribute value. - rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_DATA, &i_target, attrRingData); + // Read in the PLL Ring DATA based on the frequency attributes. + if ( is_simulation ) + { + rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_DATA, &i_target, attrRingData); + } + else if ( nest_freq == 2000 ) + { + switch (mss_freq) { + case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_DATA, &i_target, attrRingData); break; + case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_DATA, &i_target, attrRingData); break; + case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_DATA, &i_target, attrRingData); break; + case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_DATA, &i_target, attrRingData); break; + default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + } + } + else if ( nest_freq == 2400 ) + { + switch (mss_freq) { + case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_DATA, &i_target, attrRingData); break; + case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_DATA, &i_target, attrRingData); break; + case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_DATA, &i_target, attrRingData); break; + case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_DATA, &i_target, attrRingData); break; + default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + } + } + else + { + FAPI_ERR("Un-Supported NEST frequency detected: %d.", nest_freq); + FAPI_ERR("NEST frequency of 2000 or 2400 expected."); + break; + } if (rc) { - FAPI_ERR("Failed to get attribute: ATTR_MEMB_TP_BNDY_PLL_DATA."); + FAPI_ERR("Failed to get the PLL ring DATA attribute."); break; } + // Set the ring_data buffer to the right length for the ring data rc_ecmd |= ring_data.setBitLength(ring_length); // This length needs to match the real scan length in the scandef file (Required for hostboot.) if (rc_ecmd) @@ -367,6 +493,12 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: cen_mem_pll_initf.C,v $ +Revision 1.8 2013/10/02 16:09:38 mfred +Mask FIR bit during scanning to resolve HW255774. Add code to load desired MEM PLL freq after determining DDR freq. + +Revision 1.7 2013/07/08 14:00:24 mfred +Back out accidental change. + Revision 1.5 2013/03/04 17:56:24 mfred Add some header comments for BACKUP and SCREEN. diff --git a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C index 5017535b9..a6a84af6e 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C +++ b/src/usr/hwpf/hwp/dram_training/mss_ddr_phy_reset/mss_ddr_phy_reset.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_ddr_phy_reset.C,v 1.25 2013/06/26 17:40:56 mwuu Exp $ +// $Id: mss_ddr_phy_reset.C,v 1.26 2013/09/16 20:17:57 mwuu Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/mss_ddr_phy_reset.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -74,30 +74,28 @@ ReturnCode mss_ddr_phy_flush(const fapi::Target & i_target); fapi::ReturnCode mss_ddr_phy_reset(const fapi::Target & i_target) { - // Target is centaur.mba fapi::ReturnCode rc; - fapi::ReturnCode slewcal_rc; - fapi::ReturnCode phyflush_rc; rc = mss_ddr_phy_reset_cloned(i_target); - - slewcal_rc = mss_slew_cal(i_target); - - // If mss_ddr_phy_reset returns an error - // then log the error from mss_slew_cal (if any) and pass the error from mss_ddr_phy_reset - // If only mss_slew_cal returns an error - // then move that error to RC and pass it along - if ((slewcal_rc) && (rc)) - { - FAPI_ERR(" mss_slew_cal failed! rc = 0x%08X (creator = %d)", uint32_t(slewcal_rc), slewcal_rc.getCreator()); - fapiLogError(slewcal_rc); + if (rc) { + FAPI_ERR(" mss_ddr_phy_reset_cloned failed! rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator()); } - else if (slewcal_rc) + else // reset successful { - rc = slewcal_rc; - } + rc = mss_slew_cal(i_target); + if (rc) { + FAPI_ERR(" mss_slew_cal failed! rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator()); + } + else // slew cal successful + { + rc = mss_ddr_phy_flush(i_target); + if (rc) { + FAPI_ERR(" mss_ddr_phy_flush failed! rc = 0x%08X (creator = %d)", uint32_t(rc), rc.getCreator()); + } + } + } // should exit early if any functions has a bad return code // If mss_unmask_ddrphy_errors gets it's own bad rc, // it will commit the passed in rc (if non-zero), and return it's own bad rc. @@ -105,21 +103,9 @@ fapi::ReturnCode mss_ddr_phy_reset(const fapi::Target & i_target) // it will just return the passed in rc. rc = mss_unmask_ddrphy_errors(i_target, rc); - phyflush_rc = mss_ddr_phy_flush(i_target); - - if ((phyflush_rc) && (rc)) - { - FAPI_ERR(" mss_ddr_phy_flush failed! rc = 0x%08X (creator = %d)", uint32_t(phyflush_rc), phyflush_rc.getCreator()); - } - else if (phyflush_rc) - { - rc = phyflush_rc; - } - return rc; } - fapi::ReturnCode mss_ddr_phy_reset_cloned(const fapi::Target & i_target) { // Target is centaur.mba @@ -1176,6 +1162,9 @@ This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: mss_ddr_phy_reset.C,v $ +Revision 1.26 2013/09/16 20:17:57 mwuu +Cleanup of the calling functions so first fail will run unmask function. + Revision 1.25 2013/06/26 17:40:56 mwuu Submitting Mark Fredrickson's clean up from FW review. diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C index c6372259a..4e406f694 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C +++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_draminit_training_advanced.C,v 1.37 2013/09/04 08:50:49 lapietra Exp $ +// $Id: mss_draminit_training_advanced.C,v 1.38 2013/09/19 19:02:10 bellows Exp $ /* File is created by SARAVANAN SETHURAMAN on Thur 29 Sept 2011. */ //------------------------------------------------------------------------------ @@ -77,6 +77,7 @@ // 1.35 | sasethur |08-Aug-13| Fixed fw comment // 1.36 | sasethur |23-Aug-13| Ability to run MCBIST is enabled. // 1.37 | sasethur |04-Sep-13| Fixed fw review comment +// 1.38 | bellows |19-SEP-13| fixed possible buffer overrun found by stradale // This procedure Schmoo's DRV_IMP, SLEW, VREF (DDR, CEN), RCV_IMP based on attribute from effective config procedure @@ -202,7 +203,9 @@ fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_ta { //const fapi::Target is centaur.mba fapi::ReturnCode rc; + const char* procedure_name = "mss_draminit_training_advanced"; + FAPI_INF("+++++++ Executing %s +++++++", procedure_name); // Define attribute variables diff --git a/src/usr/hwpf/hwp/include/p8_scom_addresses.H b/src/usr/hwpf/hwp/include/p8_scom_addresses.H index 4f55a0c05..c86d6d1dd 100755 --- a/src/usr/hwpf/hwp/include/p8_scom_addresses.H +++ b/src/usr/hwpf/hwp/include/p8_scom_addresses.H @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_scom_addresses.H,v 1.161 2013/08/21 15:11:23 gweber Exp $ +// $Id: p8_scom_addresses.H,v 1.164 2013/10/07 14:17:57 jeshua Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/p8_scom_addresses.H,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -186,6 +186,19 @@ CONST_UINT64_T( OTPC_M_MODE_REGISTER_0x00010008 , ULL(0x00010008) ); CONST_UINT64_T( OTPC_M_PRGM_REGISTER_0x00010009 , ULL(0x00010009) ); CONST_UINT64_T( ECID_PART_0_0x00018000 , ULL(0x00018000) ); CONST_UINT64_T( ECID_PART_1_0x00018001 , ULL(0x00018001) ); +CONST_UINT64_T( ECID_PART_12_0x0001800C , ULL(0x0001800C) ); +CONST_UINT64_T( ECID_PART_13_0x0001800D , ULL(0x0001800D) ); +CONST_UINT64_T( ECID_PART_14_0x0001800E , ULL(0x0001800E) ); +CONST_UINT64_T( ECID_PART_15_0x0001800F , ULL(0x0001800F) ); +CONST_UINT64_T( ECID_PART_16_0x00018010 , ULL(0x00018010) ); +CONST_UINT64_T( ECID_PART_17_0x00018011 , ULL(0x00018011) ); +CONST_UINT64_T( ECID_PART_18_0x00018012 , ULL(0x00018012) ); +CONST_UINT64_T( ECID_PART_19_0x00018013 , ULL(0x00018013) ); +CONST_UINT64_T( ECID_PART_20_0x00018014 , ULL(0x00018014) ); +CONST_UINT64_T( ECID_PART_21_0x00018015 , ULL(0x00018015) ); +CONST_UINT64_T( ECID_PART_22_0x00018016 , ULL(0x00018016) ); +CONST_UINT64_T( ECID_PART_23_0x00018017 , ULL(0x00018017) ); + //------------------------------------------------------------------------------ // Time of Day (TOD) @@ -1541,14 +1554,17 @@ CONST_UINT64_T( EX_L3_FIR_ACTION0_REG_0x10010806 , ULL(0x10010806) ); CONST_UINT64_T( EX_L3_FIR_ACTION1_REG_0x10010807 , ULL(0x10010807) ); CONST_UINT64_T( EX_L3_MODE_REG1_0x1001080A , ULL(0x1001080A) ); CONST_UINT64_T( EX_L3_BAR1_REG_0x1001080B , ULL(0x1001080B) ); +CONST_UINT64_T( EX_L3_PRD_PURGE_REG_0x1001080E , ULL(0x1001080E) ); +CONST_UINT64_T( EX_L3_CERRS_REG0_0x10010810 , ULL(0x10010810) ); CONST_UINT64_T( EX_L3_BAR2_REG_0x10010813 , ULL(0x10010813) ); +CONST_UINT64_T( EX_L3_PHYP_PURGE_REG_0x10010814 , ULL(0x10010814) ); CONST_UINT64_T( EX_L3_BAR_GROUP_MASK_REG_0x10010816 , ULL(0x10010816) ); -CONST_UINT64_T( EX_L3_CERRS_RD_EPS_REG_0x10010829 , ULL(0x10010829) ); -CONST_UINT64_T( EX_L3_CERRS_WR_EPS_REG_0x1001082A , ULL(0x1001082A) ); +CONST_UINT64_T( EX_L3_CERRS_REG1_0x10010817 , ULL(0x10010817) ); +CONST_UINT64_T( EX_L3_CERRS_RD_EPS_REG_0x10010829 , ULL(0x10010829) );//p8_xip_customize +CONST_UINT64_T( EX_L3_CERRS_WR_EPS_REG_0x1001082A , ULL(0x1001082A) );//p8_xip_customize CONST_UINT64_T( EX_L3_MODE_REG0_0x1001082B , ULL(0x1001082B) ); -CONST_UINT64_T( EX_L3_PRD_PURGE_REG_0x1001080E , ULL(0x1001080E) ); -CONST_UINT64_T( EX_L3_RD_EPSILON_CFG_REG_0x10010829 , ULL(0x10010829) ); -CONST_UINT64_T( EX_L3_WR_EPSILON_CFG_REG_0x1001082A , ULL(0x1001082A) ); +CONST_UINT64_T( EX_L3_RD_EPSILON_CFG_REG_0x10010829 , ULL(0x10010829) );//?? +CONST_UINT64_T( EX_L3_WR_EPSILON_CFG_REG_0x1001082A , ULL(0x1001082A) );//?? CONST_UINT64_T( EX_L3_HA_DIRTY_ADDR_WR_PTR_0x10010832 , ULL(0x10010832) ); //NCU @@ -1646,6 +1662,16 @@ CONST_UINT64_T( EX_PERV_TCTL5_POW_STAT_0x10013054 , ULL(0x10013054) ); CONST_UINT64_T( EX_PERV_TCTL6_POW_STAT_0x10013064 , ULL(0x10013064) ); CONST_UINT64_T( EX_PERV_TCTL7_POW_STAT_0x10013074 , ULL(0x10013074) ); +// TCL Spattn Status (for each thread) +CONST_UINT64_T( EX_PERV_TCTL0_SPATTN_0x10013007 , ULL(0x10013007) ); +CONST_UINT64_T( EX_PERV_TCTL1_SPATTN_0x10013017 , ULL(0x10013017) ); +CONST_UINT64_T( EX_PERV_TCTL2_SPATTN_0x10013027 , ULL(0x10013027) ); +CONST_UINT64_T( EX_PERV_TCTL3_SPATTN_0x10013037 , ULL(0x10013037) ); +CONST_UINT64_T( EX_PERV_TCTL4_SPATTN_0x10013047 , ULL(0x10013047) ); +CONST_UINT64_T( EX_PERV_TCTL5_SPATTN_0x10013057 , ULL(0x10013057) ); +CONST_UINT64_T( EX_PERV_TCTL6_SPATTN_0x10013067 , ULL(0x10013067) ); +CONST_UINT64_T( EX_PERV_TCTL7_SPATTN_0x10013077 , ULL(0x10013077) ); + // Thread Active Status CONST_UINT64_T( EX_PERV_THREAD_ACTIVE_0x1001310E , ULL(0x1001310E) ); @@ -1785,6 +1811,13 @@ CONST_UINT64_T( EX_HANG_P5_0x100F0025 , ULL(0x100F0025) ); CONST_UINT64_T( EX_HANG_P6_0x100F0026 , ULL(0x100F0026) ); CONST_UINT64_T( EX_HANG_PRE_0x100F0028 , ULL(0x100F0028) ); +//PCB Error Capture +CONST_UINT64_T( EX_PCBS_ATTN_REG_0x100F001A , ULL(0x100F001A) ); +CONST_UINT64_T( EX_PCBS_RECOV_REG_0x100F001B , ULL(0x100F001B) ); +CONST_UINT64_T( EX_PCBS_XSTOP_REG_0x100F001C , ULL(0x100F001C) ); +CONST_UINT64_T( EX_PCBS_SLAVE_CONFIG_REG_0x100F001E , ULL(0x100F001E) ); +CONST_UINT64_T( EX_PCBS_ERROR_REG_0x100F001F , ULL(0x100F001F) ); + // Atomic Lock CONST_UINT64_T( EX_ATOMIC_LOCK_0x100F03FF , ULL(0x100F03FF) ); @@ -1966,6 +1999,16 @@ This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: p8_scom_addresses.H,v $ +Revision 1.164 2013/10/07 14:17:57 jeshua +Added some L3 registers and ECID (OTPROM) registers + +Revision 1.163 2013/10/04 15:50:56 jmcgill +add TCTL special attention status registers + +Revision 1.162 2013/10/03 14:56:38 stillgs + +Added EX PCB Slave error capture registers + Revision 1.161 2013/08/21 15:11:23 gweber added CFAM_OSCSW_SENSE1,2 diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C index d22ff381e..2300be718 100644 --- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C +++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_bulk_pwr_throttles.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_bulk_pwr_throttles.C,v 1.13 2013/07/22 14:10:45 pardeik Exp $ +// $Id: mss_bulk_pwr_throttles.C,v 1.14 2013/09/19 19:02:06 bellows Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/ // centaur/working/procedures/ipl/fapi/mss_bulk_pwr_throttles.C,v $ //------------------------------------------------------------------------------ @@ -70,6 +70,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.14 | bellows |19-SEP-13| fixed possible buffer overrun found by stradale // 1.13 | pardeik |19-JUL-13| removed code to identify if throttles are // | | | based on thermal or power reasons since the // | | | runtime throttles will now be determined @@ -152,6 +153,7 @@ extern "C" { fapi::ReturnCode rc; const char* procedure_name = "mss_bulk_pwr_throttles"; + FAPI_IMP("*** Running %s on %s ***", procedure_name, i_target_mba.toEcmdString()); diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C index 65381e568..7fe7da0ff 100644 --- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C +++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_eff_config_thermal.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_eff_config_thermal.C,v 1.17 2013/07/22 14:09:20 pardeik Exp $ +// $Id: mss_eff_config_thermal.C,v 1.18 2013/09/19 19:02:12 bellows Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/ // centaur/working/procedures/ipl/fapi/mss_eff_config_thermal.C,v $ //------------------------------------------------------------------------------ @@ -53,6 +53,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.18 | bellows |19-SEP-13| fixed possible buffer overrun found by stradale // 1.17 | pardeik |19-JUL-13| Use runtime throttles for IPL for scominit // | | | Removed MRW safemode throttle stuff // | | | Always determine runtime throttles now @@ -203,6 +204,7 @@ extern "C" { fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS; const char* procedure_name = "mss_eff_config_thermal"; + FAPI_IMP("*** Running %s on %s ***", procedure_name, i_target_mba.toEcmdString()); @@ -1196,7 +1198,8 @@ extern "C" { { fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS; - const char* procedure_name = "mss_eff_config_thermal_term"; + const char* procedure_name = "mss_eff_config_thermal_term"; + FAPI_IMP("*** Running %s ***", procedure_name); uint8_t number_nets_term_rd; @@ -1827,8 +1830,8 @@ extern "C" { { fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS; - char procedure_name[32]; - sprintf(procedure_name, "mss_eff_config_thermal_get_wc_term"); + const char * procedure_name = "mss_eff_config_thermal_get_wc_term"; + FAPI_IMP("*** Running %s ***", procedure_name); uint8_t l_cen_dq_dqs_rcv_imp[NUM_PORTS]; @@ -2044,6 +2047,7 @@ extern "C" { fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS; const char* procedure_name = "mss_eff_config_thermal_get_cen_drv_value"; + FAPI_IMP("*** Running %s ***", procedure_name); switch (i_cen_dq_dqs_drv_imp) diff --git a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C index 59a7d2950..0ad3e1bed 100644 --- a/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C +++ b/src/usr/hwpf/hwp/mc_config/mss_eff_config/mss_throttle_to_power.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_throttle_to_power.C,v 1.9 2012/12/12 20:10:47 pardeik Exp $ +// $Id: mss_throttle_to_power.C,v 1.10 2013/09/19 19:02:19 bellows Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/ // centaur/working/procedures/ipl/fapi/mss_throttle_to_power.C,v $ //------------------------------------------------------------------------------ @@ -47,6 +47,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.10 | bellows |19-SEP-13| fixed possible buffer overrun found by stradale // 1.9 | pardeik |04-DEC-12| update lines to have a max width of 80 chars // | | | added FAPI_ERR before return code lines // | | | made trace statements for procedures FAPI_IMP @@ -118,6 +119,7 @@ extern "C" { fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS; const char* procedure_name = "mss_throttle_to_power"; + FAPI_IMP("*** Running %s ***", procedure_name); uint32_t throttle_n_per_mba; @@ -194,6 +196,7 @@ extern "C" { fapi::ReturnCode rc = fapi::FAPI_RC_SUCCESS; const char* procedure_name = "mss_throttle_to_power_calc"; + FAPI_IMP("*** Running %s ***", procedure_name); const uint8_t MAX_NUM_PORTS = 2; diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C index bca3f4d60..e6afbd2f8 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_oha_init.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: p8_oha_init.C,v 1.12 2013/08/02 19:00:04 stillgs Exp $ +// $Id: p8_oha_init.C,v 1.13 2013/09/12 16:08:45 stillgs Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_oha_init.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -382,7 +382,7 @@ p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_ // std::vector<Target>::iterator itr; uint8_t l_ex_number = 0; - uint8_t attr_pm_aiss_timeout = 0; + uint8_t attr_pm_aiss_timeout; uint32_t attr_pm_tod_pulse_count_match_val = 1024; uint32_t attr_pm_ppt_timer_tick; uint32_t attr_pm_ppt_timer_match_value; @@ -406,7 +406,13 @@ p8_oha_init_init(const fapi::Target& i_target, struct_i_oha_val_init_type i_oha_ ATTR_PM_PPT_TIMER_MATCH_VALUE, "ATTR_PM_PPT_TIMER_MATCH_VALUE", &i_target, - attr_pm_ppt_timer_match_value); + attr_pm_ppt_timer_match_value); + + GETATTR(rc, + ATTR_PM_AISS_TIMEOUT, + "ATTR_PM_AISS_TIMEOUT", + &i_target, + attr_pm_aiss_timeout); // ****************************************************************** // initialize all oha_reg with scan-zero values upfront diff --git a/src/usr/hwpf/hwp/proc_otprom_registers.xml b/src/usr/hwpf/hwp/proc_otprom_registers.xml new file mode 100644 index 000000000..b00d16078 --- /dev/null +++ b/src/usr/hwpf/hwp/proc_otprom_registers.xml @@ -0,0 +1,43 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/proc_otprom_registers.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2013 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- $Id: proc_otprom_registers.xml,v 1.1 2013/04/25 19:18:15 jeshua Exp $ --> +<!-- Definition of OTPROM registers to collect on some errors --> +<hwpErrors> + <!-- First few instructions in OTPROM --> + <registerFfdc> + <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id> + <scomRegister>OTPC_M_MODE_REGISTER_0x00010008</scomRegister> + <scomRegister>ECID_PART_12_0x0001800C</scomRegister> + <scomRegister>ECID_PART_13_0x0001800D</scomRegister> + <scomRegister>ECID_PART_14_0x0001800E</scomRegister> + <scomRegister>ECID_PART_15_0x0001800F</scomRegister> + <scomRegister>ECID_PART_16_0x00018010</scomRegister> + <scomRegister>ECID_PART_17_0x00018011</scomRegister> + <scomRegister>ECID_PART_18_0x00018012</scomRegister> + <scomRegister>ECID_PART_19_0x00018013</scomRegister> + <scomRegister>ECID_PART_20_0x00018014</scomRegister> + <scomRegister>ECID_PART_21_0x00018015</scomRegister> + <scomRegister>ECID_PART_22_0x00018016</scomRegister> + <scomRegister>ECID_PART_23_0x00018017</scomRegister> + </registerFfdc> +</hwpErrors> diff --git a/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml b/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml index b5bf0ecab..04f3a7c36 100644 --- a/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml +++ b/src/usr/hwpf/hwp/runtime_errors/p8_pss_errors.xml @@ -20,7 +20,7 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: p8_pss_errors.xml,v 1.2 2013/05/23 18:44:33 stillgs Exp $ --> +<!-- $Id: p8_pss_errors.xml,v 1.3 2013/08/02 19:15:43 stillgs Exp $ --> <!-- Error definitions for proc_pmc_init procedure --> <hwpErrors> <!-- *********************************************************************** --> @@ -34,4 +34,5 @@ <rc>RC_PROCPM_PSS_WRONG_DEVICE</rc> <description>wrong device taget : make sure that you use 0xA=APSS and 0XD=DPSS no other value works.</description> </hwpError> + <!-- *********************************************************************** --> </hwpErrors> diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.C b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.C index f14c9a387..fc1ed2b2c 100644 --- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.C +++ b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.C @@ -21,7 +21,7 @@ /* */ /* IBM_PROLOG_END_TAG */ // -*- mode: C++; c-file-style: "linux"; -*- -// $Id: proc_extract_sbe_rc.C,v 1.6 2013/06/26 21:57:44 jeshua Exp $ +// $Id: proc_extract_sbe_rc.C,v 1.8 2013/09/20 15:26:29 jeshua Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_extract_sbe_rc.C,v $ //------------------------------------------------------------------------------ // *| @@ -90,11 +90,10 @@ extern "C" // i_address => The SEEPROM address to read // o_data => A uint32_t to put the data into // -// returns: fapi::ReturnCode with the error -// This procedure will NEVER return SUCCESS +// returns: fapi::ReturnCode with the error, or fapi::FAPI_RC_SUCCESS //------------------------------------------------------------------------------ fapi::ReturnCode proc_extract_sbe_rc_read_SEEPROM(const fapi::Target & i_target, - void * i_pSEEPROM, + const void * i_pSEEPROM, const uint32_t i_address, uint32_t & o_data) { @@ -134,7 +133,7 @@ extern "C" // i_engine => The type of engine that failed (SBE/SLW) // o_pc => Referenece to the uint64_t containing the PC // -// returns: fapi::ReturnCode with the error +// returns: fapi::ReturnCode with the error, or fapi::FAPI_RC_SUCCESS //------------------------------------------------------------------------------ fapi::ReturnCode proc_extract_sbe_rc_get_pc(const fapi::Target & i_target, por_engine_t i_engine, @@ -180,7 +179,7 @@ extern "C" //------------------------------------------------------------------------------ // subroutine: -// Returns the return code for the given address +// Returns the return code indicated by the PC of the engine // // parameters: i_target => Target of chip with failed SBE // i_pSEEPROM => pointer to a memory-mapped SEEPROM image @@ -190,7 +189,7 @@ extern "C" // This procedure will NEVER return SUCCESS //------------------------------------------------------------------------------ fapi::ReturnCode proc_extract_sbe_rc_from_address(const fapi::Target & i_target, - void * i_pSEEPROM, + const void * i_pSEEPROM, por_engine_t i_engine) { // return codes @@ -292,7 +291,7 @@ extern "C" // This procedure will NEVER return SUCCESS //------------------------------------------------------------------------------ fapi::ReturnCode proc_extract_sbe_rc(const fapi::Target & i_target, - void * i_pSEEPROM, + const void * i_pSEEPROM, const por_engine_t i_engine) { // return codes @@ -518,6 +517,23 @@ extern "C" } break; } + else if (((pc & SBE_ADDR_MASK) == 0x0000800000000000ull) || + ((pc & SBE_ADDR_MASK) == 0x0000000000000000ull)) + { + //PC is all zeros, which means SBE was probably never started + FAPI_ERR("PC is all zeros, which means SBE was probably never started"); + const fapi::Target & CHIP_IN_ERROR = i_target; + if(i_engine == SBE) + { + FAPI_SET_HWP_ERROR(rc,RC_PROC_EXTRACT_SBE_RC_SBE_NEVER_STARTED); + break; + } + else + { + FAPI_SET_HWP_ERROR(rc,RC_PROC_EXTRACT_SBE_RC_SLW_NEVER_STARTED); + break; + } + } } while(0); diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.H b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.H index 92bc6fea6..9cd723fec 100644 --- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.H +++ b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc.H @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: proc_extract_sbe_rc.H,v 1.3 2013/06/21 14:23:33 jeshua Exp $ +// $Id: proc_extract_sbe_rc.H,v 1.4 2013/09/20 15:26:50 jeshua Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_extract_sbe_rc.H,v $ //------------------------------------------------------------------------------ // *| @@ -60,7 +60,7 @@ enum por_engine_t { // function pointer typedef definition for HWP call support typedef fapi::ReturnCode (*proc_extract_sbe_rc_FP_t)(const fapi::Target &, - void *, + const void *, const por_engine_t); //------------------------------------------------------------------------------ @@ -84,7 +84,7 @@ extern "C" * while trying to get the error code */ fapi::ReturnCode proc_extract_sbe_rc(const fapi::Target & i_target, - void * i_pSEEPROM, + const void * i_pSEEPROM, const por_engine_t i_engine); } // extern "C" diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml index a4f1f8230..1a2ad48a8 100644 --- a/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml +++ b/src/usr/hwpf/hwp/slave_sbe/proc_check_slave_sbe_seeprom_complete/proc_extract_sbe_rc_errors.xml @@ -20,7 +20,7 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_extract_sbe_rc_errors.xml,v 1.6 2013/07/09 21:47:22 rjknight Exp $ --> +<!-- $Id: proc_extract_sbe_rc_errors.xml,v 1.7 2013/09/19 19:29:07 jeshua Exp $ --> <!-- Error definitions for proc_extract_sbe_rc procedure --> <hwpErrors> <!-- *********************************************************************** --> @@ -254,4 +254,52 @@ <target>CHIP_IN_ERROR</target> </collectRegisterFfdc> </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROC_EXTRACT_SBE_RC_SBE_NEVER_STARTED</rc> + <description> + Procedure: proc_extract_sbe_rc + Procedure was called when no error bits were set and PC is all zeros. SBE + was probably never started. + </description> + <collectRegisterFfdc> + <id>REG_FFDC_PROC_CFAM_REGISTERS</id> + <id>REG_FFDC_PROC_SBE_REGISTERS</id> + <id>REG_FFDC_PROC_FIRST_OTPROM_INSTRUCTIONS</id> + <target>CHIP_IN_ERROR</target> + </collectRegisterFfdc> + <callout> + <target>CHIP_IN_ERROR</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>CHIP_IN_ERROR</target> + </deconfigure> + <gard> + <target>CHIP_IN_ERROR</target> + </gard> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_PROC_EXTRACT_SBE_RC_SLW_NEVER_STARTED</rc> + <description> + Procedure: proc_extract_sbe_rc + Procedure was called when no error bits were set and PC is all zeros. SLW + was probably never started. + </description> + <collectRegisterFfdc> + <id>REG_FFDC_PROC_SLW_REGISTERS</id> + <target>CHIP_IN_ERROR</target> + </collectRegisterFfdc> + <callout> + <target>CHIP_IN_ERROR</target> + <priority>HIGH</priority> + </callout> + <deconfigure> + <target>CHIP_IN_ERROR</target> + </deconfigure> + <gard> + <target>CHIP_IN_ERROR</target> + </gard> + </hwpError> </hwpErrors> diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile index b286d5ab9..c1335babc 100644 --- a/src/usr/hwpf/makefile +++ b/src/usr/hwpf/makefile @@ -119,7 +119,8 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml \ hwp/mc_config/mss_eff_config/memory_mss_eff_config_rank_group.xml \ hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml \ hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml \ - hwp/build_winkle_images/proc_mailbox_utils/proc_mailbox_utils_errors.xml + hwp/build_winkle_images/proc_mailbox_utils/proc_mailbox_utils_errors.xml \ + hwp/proc_otprom_registers.xml ## these get generated into obj/genfiles/AttributeIds.H HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \ |

