Only unmask source on proc targ passed to unmask function in intrrp

There was a bug in the code where if an interrupt was resolved for
a source the code to clean up the pending interrupt in the intrrp
will unmask the source. This was actually unmasking the source on all
processors. This causes odd behavior if there was an outstanding int
on that source on one of the other processors. Essentially the intrrp
would think that a new interrupt came in but we will already be handling
it. The logic breaks down here and we end up getting in a locked state.

Fixing this caused issues with Hostboot management of the maskList
which kept track of which sources were masked. Instead of managing this
list of masked sources hostboot will instead keep track of sources which
are not registered to any msg Qs. When new processors are added to the
interrupt resource provider after fabric is up, all LSI sources who are
not registered to a msg Q will be masked for the new processor.

CQ: SW419101
Change-Id: I86f5bc2a748383e18b1853d9bf9480f265c214fd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63158
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 22 insertions, 20 deletions

diff --git a/src/include/usr/intr/intr_reasoncodes.H b/src/include/usr/intr/intr_reasoncodes.H
index 511008cd9..5048580c3 100644
--- a/src/include/usr/intr/intr_reasoncodes.H
+++ b/src/include/usr/intr/intr_reasoncodes.H
@@ -34,26 +34,27 @@ namespace INTR
 {
     enum IntrModuleID
     {
-        MOD_INVALID                  = 0x00, /**< Invalid Module ID */
-        MOD_INTR_ENABLE              = 0x01, /**< intrrp.C : INTR::enableExternalInterrupts */
-        MOD_INTR_DISABLE             = 0x02, /**< intrrp.C : INTR::disableExternalInterrupts */
-        MOD_INTR_REGISTER            = 0x03, /**< intrrp.C : INTR::registerMsgQ */
-        MOD_INTRRP_REGISTERINTERRUPT = 0x05, /**< intrrp.C : IntrRp::registerInterrupt */
-        MOD_INTR_ENABLE_PSI_INTR     = 0x06, /**< intrrp.C : INTR::enablePsiIntr */
-        MOD_INTR_INIT_XIVR           = 0x07, /**< intrrp.C : INTR::initXIVR */
-        MOD_INTR_INIT_MPIPLAREA      = 0x08, /**< intrrp.C : IntrRp::initailizeMpiplSyncArea() */
-        MOD_INTR_SYNC_NODES          = 0x09, /**< intrrp.C : IntrRp::syncNodes() */
-        MOD_INTR_SYNC_ADDNODE        = 0x0A, /**< intrrp.C : IntrRp::addHbNodeToMpiplSyncArea */
-        MOD_INTR_ADDHBNODE           = 0x0B, /**< intrrp.C : INTR::addHbNode */
-        MOD_INTR_EXTRACTNODEINFO     = 0x0C, /**< intrrp.C : INTR::extractHbNodeInfo */
-        MOD_INTRRP_SENDEOI           = 0x0D, /**< intrrp.C : INTR::sendEOI */
-        MOD_INTRRP_MASKINTERRUPT     = 0x0E, /**< intrrp.C : INTR::maskInterruptSource */
-        MOD_INTRRP_UNMASKINTERRUPT   = 0x0F, /**< intrrp.C : INTR::unmaskInterruptSource */
-        MOD_INTRRP_HNDLPSUINTERRUPT  = 0x10, /**< intrrp.C : INTR::handlePsuInterrupt */
-        MOD_INTRRP_RESETINTUNIT      = 0x11, /**< intrrp.C : IntrRp::resetIntUnit */
-        MOD_INTRRP_XIVE_SENDEOI      = 0x12,
-        MOD_INTRRP_IPC               = 0x13,
-        MOD_INTR_DUMP                = 0x14, /**< intrrp.C : INTR::printInterruptInfo */
+        MOD_INVALID                    = 0x00, /**< Invalid Module ID */
+        MOD_INTR_ENABLE                = 0x01, /**< intrrp.C : INTR::enableExternalInterrupts */
+        MOD_INTR_DISABLE               = 0x02, /**< intrrp.C : INTR::disableExternalInterrupts */
+        MOD_INTR_REGISTER              = 0x03, /**< intrrp.C : INTR::registerMsgQ */
+        MOD_INTRRP_REGISTERINTERRUPT   = 0x05, /**< intrrp.C : IntrRp::registerInterrupt */
+        MOD_INTR_ENABLE_PSI_INTR       = 0x06, /**< intrrp.C : INTR::enablePsiIntr */
+        MOD_INTR_INIT_XIVR             = 0x07, /**< intrrp.C : INTR::initXIVR */
+        MOD_INTR_INIT_MPIPLAREA        = 0x08, /**< intrrp.C : IntrRp::initailizeMpiplSyncArea() */
+        MOD_INTR_SYNC_NODES            = 0x09, /**< intrrp.C : IntrRp::syncNodes() */
+        MOD_INTR_SYNC_ADDNODE          = 0x0A, /**< intrrp.C : IntrRp::addHbNodeToMpiplSyncArea */
+        MOD_INTR_ADDHBNODE             = 0x0B, /**< intrrp.C : INTR::addHbNode */
+        MOD_INTR_EXTRACTNODEINFO       = 0x0C, /**< intrrp.C : INTR::extractHbNodeInfo */
+        MOD_INTRRP_SENDEOI             = 0x0D, /**< intrrp.C : INTR::sendEOI */
+        MOD_INTRRP_MASKINTERRUPT       = 0x0E, /**< intrrp.C : INTR::maskInterruptSource */
+        MOD_INTRRP_UNMASKINTERRUPT     = 0x0F, /**< intrrp.C : INTR::unmaskInterruptSource */
+        MOD_INTRRP_HNDLPSUINTERRUPT    = 0x10, /**< intrrp.C : INTR::handlePsuInterrupt */
+        MOD_INTRRP_RESETINTUNIT        = 0x11, /**< intrrp.C : IntrRp::resetIntUnit */
+        MOD_INTRRP_XIVE_SENDEOI        = 0x12,
+        MOD_INTRRP_IPC                 = 0x13,
+        MOD_INTR_DUMP                  = 0x14, /**< intrrp.C : INTR::printInterruptInfo */
+        MOD_INTRRP_UNREGISTERINTERRUPT = 0x15, /**< intrrp.C : IntrRp::unregisterInterrupt */
     };
 
     enum IntrReasonCode
@@ -72,6 +73,7 @@ namespace INTR
         RC_XIVE_PBUS_QUIESCE_TIMEOUT  = INTR_COMP_ID | 0x0B,
         RC_MESSAGE_SEND_ERROR         = INTR_COMP_ID | 0x0C,
         RC_IPC_DATA_INVALID           = INTR_COMP_ID | 0x0D,
+        RC_SOURCE_NOT_REGISTERED      = INTR_COMP_ID | 0x0E,
     };
 };