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authorChristian Geddes <crgeddes@us.ibm.com>2018-07-23 12:53:01 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-08-01 16:13:13 -0500
commit98a657059a5cee86695434ddcf2f6f1f0a774d90 (patch)
treea276db01c3f0d884ee08856569a039a7dd3ce575 /src/include/usr/intr
parent4022351e16d2eb0368407c7a2e1d28507adcfee3 (diff)
downloadblackbird-hostboot-98a657059a5cee86695434ddcf2f6f1f0a774d90.tar.gz
blackbird-hostboot-98a657059a5cee86695434ddcf2f6f1f0a774d90.zip
Only unmask source on proc targ passed to unmask function in intrrp
There was a bug in the code where if an interrupt was resolved for a source the code to clean up the pending interrupt in the intrrp will unmask the source. This was actually unmasking the source on all processors. This causes odd behavior if there was an outstanding int on that source on one of the other processors. Essentially the intrrp would think that a new interrupt came in but we will already be handling it. The logic breaks down here and we end up getting in a locked state. Fixing this caused issues with Hostboot management of the maskList which kept track of which sources were masked. Instead of managing this list of masked sources hostboot will instead keep track of sources which are not registered to any msg Qs. When new processors are added to the interrupt resource provider after fabric is up, all LSI sources who are not registered to a msg Q will be masked for the new processor. CQ: SW419101 Change-Id: I86f5bc2a748383e18b1853d9bf9480f265c214fd Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63158 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/usr/intr')
-rw-r--r--src/include/usr/intr/interrupt.H33
-rw-r--r--src/include/usr/intr/intr_reasoncodes.H42
2 files changed, 41 insertions, 34 deletions
diff --git a/src/include/usr/intr/interrupt.H b/src/include/usr/intr/interrupt.H
index 5456eefbe..450ae8d0c 100644
--- a/src/include/usr/intr/interrupt.H
+++ b/src/include/usr/intr/interrupt.H
@@ -38,6 +38,9 @@ namespace INTR
typedef uint32_t ext_intr_t;
// Interrupt Source Number (ISN) Definition
+ // NOTE: It is assumed that LSI sources interrupts in
+ // this list have values that match the LSI source
+ // values listed in the LSIvalue_t enum
enum ISNvalue_t
{
ISN_PSI = 0,
@@ -47,6 +50,7 @@ namespace INTR
ISN_LPC = 3,
ISN_LCL_ERR = 4,
ISN_HOST = 5,
+ ISN_PSU = 13,
ISN_INTERPROC = 0xF0, // Interproc (IPC) Message Type
SHUT_DOWN = 0x01000000, //!< INTR presenter sends this when shutting down
};
@@ -55,20 +59,21 @@ namespace INTR
// on the PSIHB. These should only be changed if the spec changes.
enum LSIvalue_t
{
- LSI_PSI = 0,
- LSI_OCC = 1,
- LSI_FSIMBOX = 2,
- LSI_LPC = 3,
- LSI_LCL_FIR = 4,
- LSI_GLOBAL = 5,
- LSI_TPM = 6,
- LSI_LPC_SERIAL0 = 7,
- LSI_LPC_SERIAL1 = 8,
- LSI_LPC_SERIAL2 = 9,
- LSI_LPC_SERIAL3 = 10,
- LSI_SBE_OR_I2C = 11,
- LSI_DIO = 12,
- LSI_PSU = 13,
+ LSI_FIRST_SOURCE = 0,
+ LSI_PSI = LSI_FIRST_SOURCE,
+ LSI_OCC = 1,
+ LSI_FSIMBOX = 2,
+ LSI_LPC = 3,
+ LSI_LCL_FIR = 4,
+ LSI_GLOBAL = 5,
+ LSI_TPM = 6,
+ LSI_LPC_SERIAL0 = 7,
+ LSI_LPC_SERIAL1 = 8,
+ LSI_LPC_SERIAL2 = 9,
+ LSI_LPC_SERIAL3 = 10,
+ LSI_SBE_OR_I2C = 11,
+ LSI_DIO = 12,
+ LSI_PSU = 13,
LSI_LAST_SOURCE,
};
diff --git a/src/include/usr/intr/intr_reasoncodes.H b/src/include/usr/intr/intr_reasoncodes.H
index 511008cd9..5048580c3 100644
--- a/src/include/usr/intr/intr_reasoncodes.H
+++ b/src/include/usr/intr/intr_reasoncodes.H
@@ -34,26 +34,27 @@ namespace INTR
{
enum IntrModuleID
{
- MOD_INVALID = 0x00, /**< Invalid Module ID */
- MOD_INTR_ENABLE = 0x01, /**< intrrp.C : INTR::enableExternalInterrupts */
- MOD_INTR_DISABLE = 0x02, /**< intrrp.C : INTR::disableExternalInterrupts */
- MOD_INTR_REGISTER = 0x03, /**< intrrp.C : INTR::registerMsgQ */
- MOD_INTRRP_REGISTERINTERRUPT = 0x05, /**< intrrp.C : IntrRp::registerInterrupt */
- MOD_INTR_ENABLE_PSI_INTR = 0x06, /**< intrrp.C : INTR::enablePsiIntr */
- MOD_INTR_INIT_XIVR = 0x07, /**< intrrp.C : INTR::initXIVR */
- MOD_INTR_INIT_MPIPLAREA = 0x08, /**< intrrp.C : IntrRp::initailizeMpiplSyncArea() */
- MOD_INTR_SYNC_NODES = 0x09, /**< intrrp.C : IntrRp::syncNodes() */
- MOD_INTR_SYNC_ADDNODE = 0x0A, /**< intrrp.C : IntrRp::addHbNodeToMpiplSyncArea */
- MOD_INTR_ADDHBNODE = 0x0B, /**< intrrp.C : INTR::addHbNode */
- MOD_INTR_EXTRACTNODEINFO = 0x0C, /**< intrrp.C : INTR::extractHbNodeInfo */
- MOD_INTRRP_SENDEOI = 0x0D, /**< intrrp.C : INTR::sendEOI */
- MOD_INTRRP_MASKINTERRUPT = 0x0E, /**< intrrp.C : INTR::maskInterruptSource */
- MOD_INTRRP_UNMASKINTERRUPT = 0x0F, /**< intrrp.C : INTR::unmaskInterruptSource */
- MOD_INTRRP_HNDLPSUINTERRUPT = 0x10, /**< intrrp.C : INTR::handlePsuInterrupt */
- MOD_INTRRP_RESETINTUNIT = 0x11, /**< intrrp.C : IntrRp::resetIntUnit */
- MOD_INTRRP_XIVE_SENDEOI = 0x12,
- MOD_INTRRP_IPC = 0x13,
- MOD_INTR_DUMP = 0x14, /**< intrrp.C : INTR::printInterruptInfo */
+ MOD_INVALID = 0x00, /**< Invalid Module ID */
+ MOD_INTR_ENABLE = 0x01, /**< intrrp.C : INTR::enableExternalInterrupts */
+ MOD_INTR_DISABLE = 0x02, /**< intrrp.C : INTR::disableExternalInterrupts */
+ MOD_INTR_REGISTER = 0x03, /**< intrrp.C : INTR::registerMsgQ */
+ MOD_INTRRP_REGISTERINTERRUPT = 0x05, /**< intrrp.C : IntrRp::registerInterrupt */
+ MOD_INTR_ENABLE_PSI_INTR = 0x06, /**< intrrp.C : INTR::enablePsiIntr */
+ MOD_INTR_INIT_XIVR = 0x07, /**< intrrp.C : INTR::initXIVR */
+ MOD_INTR_INIT_MPIPLAREA = 0x08, /**< intrrp.C : IntrRp::initailizeMpiplSyncArea() */
+ MOD_INTR_SYNC_NODES = 0x09, /**< intrrp.C : IntrRp::syncNodes() */
+ MOD_INTR_SYNC_ADDNODE = 0x0A, /**< intrrp.C : IntrRp::addHbNodeToMpiplSyncArea */
+ MOD_INTR_ADDHBNODE = 0x0B, /**< intrrp.C : INTR::addHbNode */
+ MOD_INTR_EXTRACTNODEINFO = 0x0C, /**< intrrp.C : INTR::extractHbNodeInfo */
+ MOD_INTRRP_SENDEOI = 0x0D, /**< intrrp.C : INTR::sendEOI */
+ MOD_INTRRP_MASKINTERRUPT = 0x0E, /**< intrrp.C : INTR::maskInterruptSource */
+ MOD_INTRRP_UNMASKINTERRUPT = 0x0F, /**< intrrp.C : INTR::unmaskInterruptSource */
+ MOD_INTRRP_HNDLPSUINTERRUPT = 0x10, /**< intrrp.C : INTR::handlePsuInterrupt */
+ MOD_INTRRP_RESETINTUNIT = 0x11, /**< intrrp.C : IntrRp::resetIntUnit */
+ MOD_INTRRP_XIVE_SENDEOI = 0x12,
+ MOD_INTRRP_IPC = 0x13,
+ MOD_INTR_DUMP = 0x14, /**< intrrp.C : INTR::printInterruptInfo */
+ MOD_INTRRP_UNREGISTERINTERRUPT = 0x15, /**< intrrp.C : IntrRp::unregisterInterrupt */
};
enum IntrReasonCode
@@ -72,6 +73,7 @@ namespace INTR
RC_XIVE_PBUS_QUIESCE_TIMEOUT = INTR_COMP_ID | 0x0B,
RC_MESSAGE_SEND_ERROR = INTR_COMP_ID | 0x0C,
RC_IPC_DATA_INVALID = INTR_COMP_ID | 0x0D,
+ RC_SOURCE_NOT_REGISTERED = INTR_COMP_ID | 0x0E,
};
};
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