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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-03-19 21:50:01 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-29 10:24:09 -0400 |
| commit | 95885db4643c8afb904200d8d1317cad79b11fa3 (patch) | |
| tree | 3261bab1b1ffdb9ebf8edafb7f43d2ba2f2cfc16 /src/build/citest | |
| parent | 0d4be263d0fafd69e3715b43d4d329b337c42501 (diff) | |
| download | blackbird-hostboot-95885db4643c8afb904200d8d1317cad79b11fa3.tar.gz blackbird-hostboot-95885db4643c8afb904200d8d1317cad79b11fa3.zip | |
support customization of Nimbus DD1 PCI reference clock speed
rename existing EC feature attribute, now serves as DD1N enable qualifying
application of MRW-sourced ATTR_DD1_SLOW_PCI_REF_CLOCK:
0 = NORMAL = 100 MHz
1 = SLOW = 94 MHz
MRW attribute is plumbed through SBE mailbox (scratch 5 bit 5, value
inverted) and added to XIP customize
CMVC-Prereq:1020384
Change-Id: I376f06d0d49ab3d39c965e3131d484cbe9535566
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38129
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38135
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/build/citest')
| -rwxr-xr-x | src/build/citest/etc/workarounds.postsimsetup | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 5e945a745..fc424a148 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -27,15 +27,24 @@ ## Workarounds that are run after start_simics is executed for the first time ## to setup the sandbox ## - ### Example applying a patch to cec-chip files #echo "+++ Updating something wonderful in a simics file" #mkdir -p $sb/simu/data/cec-chip/ #cp $BACKING_BUILD/src/simu/data/cec-chip/base_cec_chip_file $sb/simu/data/cec-chip #patch -p0 $sb/simu/data/cec-chip/base_cec_chip_file $PROJECT_ROOT/src/build/citest/etc/patches/my_patch_File - #pull in new actions in p9_memory.act RTC 171066 echo "+++ Updating p9n_memory.act file for p9_mss_ddr_phy_reset" sbex -t 1019444 +#pull in href makefile fix +echo "+++ Updating href makefile" +sbex -t 1020522 + +#pull in new sbe image +echo "+++ Updating sbe image" +sbex -t 1020384 +chmod 777 $sb/sbei/sbfw/img/* +mkdir -p $sb/engd/href/ +cd $sb/engd/href +mk -a -k |
