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* Update register generation to use type identifieres for port0 - 3.Lojewski, Evan2019-05-112-835/+28
* Update regen script to remove unused sim files.Evan Lojewski2019-05-051-0/+4
* Add retire bit to RegAPERxPoolRetire0_tEvan Lojewski2019-05-051-0/+28
* Add the Finished bit for releasing the frame.Evan Lojewski2019-05-052-1/+6
* Update TX/RX sim generationEvan Lojewski2019-05-021-2/+0
* Add initial RX port register generation.Evan Lojewski2019-05-022-10/+43
* Begin moving APE tx code from the host to the APE.Evan Lojewski2019-05-021-4/+4
* Additioanl tx trialsEvan Lojewski2019-05-012-7/+83
* Fix register definiton for ape peripheral.Evan Lojewski2019-04-292-7/+60
* Add enumeration for block size.Evan Lojewski2019-04-281-0/+17
* Update tx port ipxact definition and regen.Evan Lojewski2019-04-282-2/+14
* Add MAC address match registers and regenerate.Evan Lojewski2019-04-223-19/+266
* Add RX queue information and fix symbols sizes.Evan Lojewski2019-04-202-4/+13
* Begin adding support for setting ape statistics in the SHM region.Evan Lojewski2019-04-143-69/+224
* Split APE register region into two - mapped in different places based on host...Evan Lojewski2019-04-133-44/+68
* Regenrate headers with additional APE registers for RX/TX.Evan Lojewski2019-04-132-1/+582
* Update APE registers to exist in the APE code.Evan Lojewski2019-04-094-1397/+2553
* Add initial rx-from-network initialization code.Evan Lojewski2019-04-061-1/+5
* Add initial indeirect APE read support for the host cxxsim code.Evan Lojewski2019-04-062-1/+5
* Begin adding registers for APE tx/rx from netwokr.Evan Lojewski2019-04-043-1/+437
* Add initial ape loade rbinary to allow the bcmregtool to read/write arbitrary...Evan Lojewski2019-04-031-0/+73
* Fix NVIC register definitions.Evan Lojewski2019-04-011-2/+2
* Update ipxact definition an regen.Evan Lojewski2019-04-012-3/+20
* LAtest ipxact version with typo fixes.Evan Lojewski2019-03-241-1/+1
* Split APE SHM out of the APE register area. Instantiate 4x in the APE, one pe...Evan Lojewski2019-03-234-1055/+1164
* Split out DEVICE registers and add 4x instances for the APE.Evan Lojewski2019-03-236-3931/+4494
* Start adding in APE register generation.Evan Lojewski2019-03-234-929/+982
* SPlit NVM registers out of bcm5719 xml.Evan Lojewski2019-03-232-448/+8
* Add remaining NVIC registers.Evan Lojewski2019-03-201-0/+801
* Allow spaces in the build path.Evan Lojewski2019-03-181-0/+148
* Update ipxact to include remaining lock bits for the APE.Evan Lojewski2019-03-161-0/+42
* Update ipxact to include addtional APE registers.Evan Lojewski2019-03-161-8/+1229
* Add som additional attention register information from the manual.Evan Lojewski2019-03-161-0/+36
* Add additional shadowed MII regisers and APE registers.Evan Lojewski2019-03-131-42/+1182
* Add in additional NVM configuration registers to the ipxact and regenerate.Evan Lojewski2019-03-111-0/+179
* Fix MiscellaneousHostControl definitionEvan Lojewski2019-02-231-1/+1
* Update stage1 to load stage2 and report the status.Evan Lojewski2019-02-231-0/+34
* Add bootcode location to ipxact and regenerate.Evan Lojewski2019-02-232-2/+17
* Add generation of various memoriesEvan Lojewski2019-02-182-6/+25
* Revert change to MII addressUnitBitsEvan Lojewski2019-02-161-1/+1
* Fix MII register addresses and impliment accessing paged blocks.Evan Lojewski2019-02-161-1/+9
* Fix parsing of the power budget from nvm.Evan Lojewski2019-02-161-57/+889
* Add missing register definitions for power budget 1-7Evan Lojewski2019-02-161-0/+98
* Regen ipxact output with a project name specified.Evan Lojewski2019-02-141-4/+5
* Add initial bcm5719 library with various component addresses. Ensure ASM file...Evan Lojewski2018-06-151-0/+2
* Begin enabling building for mips targets.Evan Lojewski2018-06-131-0/+3
* Begin setting up buidl system to build fw, tests, and utils.Evan Lojewski2018-05-171-4/+41
* Update cxx register wraper to only copy base register. Ensure write callback ...Evan Lojewski2018-05-152-1/+1
* Initial source code import.Evan Lojewski2018-05-132-0/+6245
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