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authorLojewski, Evan <github@meklort.com>2019-05-11 08:31:30 -0600
committerLojewski, Evan <github@meklort.com>2019-05-11 08:31:30 -0600
commitbc89c73168282c7de5eaa1ae836f3c1bd3c3fc5e (patch)
tree9366e0e7464eda2a35e3bc5a39b1d3f8edf9a6f4 /include/APE_FILTERS1.h
parenta7c487b03ac7fed1f6d1ac87363feb7c5bd18484 (diff)
downloadbcm5719-ortega-bc89c73168282c7de5eaa1ae836f3c1bd3c3fc5e.tar.gz
bcm5719-ortega-bc89c73168282c7de5eaa1ae836f3c1bd3c3fc5e.zip
Update register generation to use type identifieres for port0 - 3.
Diffstat (limited to 'include/APE_FILTERS1.h')
-rw-r--r--include/APE_FILTERS1.h89
1 files changed, 0 insertions, 89 deletions
diff --git a/include/APE_FILTERS1.h b/include/APE_FILTERS1.h
index 9474688..dad4fdf 100644
--- a/include/APE_FILTERS1.h
+++ b/include/APE_FILTERS1.h
@@ -83,98 +83,9 @@ typedef uint32_t APE_FILTERS1_H_uint32_t;
#define REG_FILTERS1_SIZE (sizeof(FILTERS_t))
#define REG_FILTERS1_ELEMENT_CONFIG ((volatile APE_FILTERS1_H_uint32_t*)0xa0058000) /* Element Configuration Register. */
-#define FILTERS1_ELEMENT_CONFIG_RULE_OFFSET_SHIFT 0u
-#define FILTERS1_ELEMENT_CONFIG_RULE_OFFSET_MASK 0xffu
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_OFFSET(__reg__) (((__reg__) & 0xff) >> 0u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_OFFSET(__val__) (((__val__) << 0u) & 0xffu)
-#define FILTERS1_ELEMENT_CONFIG_RULE_CLASS_SHIFT 8u
-#define FILTERS1_ELEMENT_CONFIG_RULE_CLASS_MASK 0x1f00u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_CLASS(__reg__) (((__reg__) & 0x1f00) >> 8u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_CLASS(__val__) (((__val__) << 8u) & 0x1f00u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_SHIFT 13u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_MASK 0xe000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_HEADER(__reg__) (((__reg__) & 0xe000) >> 13u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_HEADER(__val__) (((__val__) << 13u) & 0xe000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_SOF 0x0u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_IP 0x1u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_TCP 0x2u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_UDP 0x3u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_DATA 0x4u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_ICMPV4 0x5u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_ICMPV6 0x6u
-#define FILTERS1_ELEMENT_CONFIG_RULE_HEADER_VLAN 0x7u
-
-#define FILTERS1_ELEMENT_CONFIG_RULE_OP_SHIFT 16u
-#define FILTERS1_ELEMENT_CONFIG_RULE_OP_MASK 0x30000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_OP(__reg__) (((__reg__) & 0x30000) >> 16u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_OP(__val__) (((__val__) << 16u) & 0x30000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_OP_EQ 0x0u
-#define FILTERS1_ELEMENT_CONFIG_RULE_OP_NE 0x1u
-#define FILTERS1_ELEMENT_CONFIG_RULE_OP_GT 0x2u
-#define FILTERS1_ELEMENT_CONFIG_RULE_OP_LT 0x3u
-
-#define FILTERS1_ELEMENT_CONFIG_RULE_MAP_SHIFT 24u
-#define FILTERS1_ELEMENT_CONFIG_RULE_MAP_MASK 0x1000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_MAP(__reg__) (((__reg__) & 0x1000000) >> 24u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_MAP(__val__) (((__val__) << 24u) & 0x1000000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_DISCARD_SHIFT 25u
-#define FILTERS1_ELEMENT_CONFIG_RULE_DISCARD_MASK 0x2000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_DISCARD(__reg__) (((__reg__) & 0x2000000) >> 25u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_DISCARD(__val__) (((__val__) << 25u) & 0x2000000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_MASK_SHIFT 26u
-#define FILTERS1_ELEMENT_CONFIG_RULE_MASK_MASK 0x4000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_MASK(__reg__) (((__reg__) & 0x4000000) >> 26u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_MASK(__val__) (((__val__) << 26u) & 0x4000000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_P3_SHIFT 27u
-#define FILTERS1_ELEMENT_CONFIG_RULE_P3_MASK 0x8000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_P3(__reg__) (((__reg__) & 0x8000000) >> 27u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_P3(__val__) (((__val__) << 27u) & 0x8000000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_P2_SHIFT 28u
-#define FILTERS1_ELEMENT_CONFIG_RULE_P2_MASK 0x10000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_P2(__reg__) (((__reg__) & 0x10000000) >> 28u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_P2(__val__) (((__val__) << 28u) & 0x10000000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_P1_SHIFT 29u
-#define FILTERS1_ELEMENT_CONFIG_RULE_P1_MASK 0x20000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_P1(__reg__) (((__reg__) & 0x20000000) >> 29u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_P1(__val__) (((__val__) << 29u) & 0x20000000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_AND_SHIFT 30u
-#define FILTERS1_ELEMENT_CONFIG_RULE_AND_MASK 0x40000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_AND(__reg__) (((__reg__) & 0x40000000) >> 30u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_AND(__val__) (((__val__) << 30u) & 0x40000000u)
-#define FILTERS1_ELEMENT_CONFIG_RULE_ENABLE_SHIFT 31u
-#define FILTERS1_ELEMENT_CONFIG_RULE_ENABLE_MASK 0x80000000u
-#define GET_FILTERS1_ELEMENT_CONFIG_RULE_ENABLE(__reg__) (((__reg__) & 0x80000000) >> 31u)
-#define SET_FILTERS1_ELEMENT_CONFIG_RULE_ENABLE(__val__) (((__val__) << 31u) & 0x80000000u)
-
#define REG_FILTERS1_ELEMENT_PATTERN ((volatile APE_FILTERS1_H_uint32_t*)0xa0058080) /* If RULE_MASK is set, low 16 bits are a bitmask and high 16 bits are the value masked by it. If it is not set, the entire field is a 32-bit match value. */
#define REG_FILTERS1_RULE_CONFIGURATION ((volatile APE_FILTERS1_H_uint32_t*)0xa0058100) /* */
-#define FILTERS1_RULE_CONFIGURATION_FILTER_SET_DISABLE_SHIFT 0u
-#define FILTERS1_RULE_CONFIGURATION_FILTER_SET_DISABLE_MASK 0x1u
-#define GET_FILTERS1_RULE_CONFIGURATION_FILTER_SET_DISABLE(__reg__) (((__reg__) & 0x1) >> 0u)
-#define SET_FILTERS1_RULE_CONFIGURATION_FILTER_SET_DISABLE(__val__) (((__val__) << 0u) & 0x1u)
-#define FILTERS1_RULE_CONFIGURATION_DIRECT_IP_FRAGMENT_TO_APE_SHIFT 31u
-#define FILTERS1_RULE_CONFIGURATION_DIRECT_IP_FRAGMENT_TO_APE_MASK 0x80000000u
-#define GET_FILTERS1_RULE_CONFIGURATION_DIRECT_IP_FRAGMENT_TO_APE(__reg__) (((__reg__) & 0x80000000) >> 31u)
-#define SET_FILTERS1_RULE_CONFIGURATION_DIRECT_IP_FRAGMENT_TO_APE(__val__) (((__val__) << 31u) & 0x80000000u)
-
#define REG_FILTERS1_RULE_SET ((volatile APE_FILTERS1_H_uint32_t*)0xa0058104) /* */
-#define FILTERS1_RULE_SET_ACTION_SHIFT 0u
-#define FILTERS1_RULE_SET_ACTION_MASK 0x3u
-#define GET_FILTERS1_RULE_SET_ACTION(__reg__) (((__reg__) & 0x3) >> 0u)
-#define SET_FILTERS1_RULE_SET_ACTION(__val__) (((__val__) << 0u) & 0x3u)
-#define FILTERS1_RULE_SET_ACTION_TO_APE_ONLY 0x0u
-#define FILTERS1_RULE_SET_ACTION_TO_APE_AND_HOST 0x1u
-#define FILTERS1_RULE_SET_ACTION_DISCARD 0x2u
-
-#define FILTERS1_RULE_SET_COUNT_SHIFT 3u
-#define FILTERS1_RULE_SET_COUNT_MASK 0x7fff8u
-#define GET_FILTERS1_RULE_SET_COUNT(__reg__) (((__reg__) & 0x7fff8) >> 3u)
-#define SET_FILTERS1_RULE_SET_COUNT(__val__) (((__val__) << 3u) & 0x7fff8u)
-#define FILTERS1_RULE_SET_ENABLE_SHIFT 31u
-#define FILTERS1_RULE_SET_ENABLE_MASK 0x80000000u
-#define GET_FILTERS1_RULE_SET_ENABLE(__reg__) (((__reg__) & 0x80000000) >> 31u)
-#define SET_FILTERS1_RULE_SET_ENABLE(__val__) (((__val__) << 31u) & 0x80000000u)
-
#define REG_FILTERS1_RULE_MASK ((volatile APE_FILTERS1_H_uint32_t*)0xa0058184) /* */
/** @brief Management Filter Registers, function 1 */
extern volatile FILTERS_t FILTERS1;
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