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path: root/mlir/lib/Transforms/PipelineDataTransfer.cpp
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* Merge Operation into OperationInst and standardize nomenclature aroundChris Lattner2019-03-291-10/+10
* Merge CFGFuncBuilder/MLFuncBuilder/FuncBuilder together into a single newChris Lattner2019-03-291-3/+3
* Merge SSAValue, CFGValue, and MLValue together into a single Value class, whichChris Lattner2019-03-291-13/+11
* Rename convenience methods to make type explicit.Jacques Pienaar2019-03-291-1/+1
* Refactor ForStmt: having it contain a StmtBlock instead of subclassingChris Lattner2019-03-291-9/+10
* Update/Fix LoopUtils::stmtBodySkew to handle loop step.Uday Bondhugula2019-03-291-16/+16
* Fix missing check for dependent DMAs in pipeline-data-transferUday Bondhugula2019-03-291-2/+26
* Update/fix -pipeline-data-transfer; fix b/120770946Uday Bondhugula2019-03-291-13/+34
* Remove allocations for memref's that become dead as a result of doubleUday Bondhugula2019-03-291-3/+13
* Updates to transformation/analysis passes/utilities. Update DMA generation passUday Bondhugula2019-03-291-4/+11
* Initialize Pass with PassID.Jacques Pienaar2019-03-291-0/+1
* Add static pass registrationJacques Pienaar2019-03-291-0/+9
* Introduce memref bound checking.Uday Bondhugula2019-03-291-1/+1
* Implement value type abstraction for types.River Riddle2019-03-291-7/+7
* Simplify FunctionPass to eliminate the CFGFunctionPass/MLFunctionPassChris Lattner2019-03-291-2/+2
* PassResult return cleanup.Uday Bondhugula2019-03-291-12/+10
* Introduce a new Operation::erase helper to generalize some code inChris Lattner2019-03-291-1/+1
* Rename Operation::getAs to Operation::dyn_castFeng Liu2019-03-291-8/+8
* Generalize / improve DMA transfer overlap; nested and multiple DMA support; r...Uday Bondhugula2019-03-291-95/+169
* Create private exclusive / single use affine computation slice for an op stmt.Uday Bondhugula2019-03-291-65/+31
* Split BuiltinOps out of StandardOps.Jacques Pienaar2019-03-291-1/+2
* [MLIR] AffineMap value typeNicolas Vasilache2019-03-291-1/+2
* Add target independent standard DMA ops: dma.start, dma.waitUday Bondhugula2019-03-291-32/+15
* [MLIR] Cleanup AffineExprNicolas Vasilache2019-03-291-1/+1
* Introduce memref replacement/rewrite support: to replace an existing memrefUday Bondhugula2019-03-291-11/+224
* Introduce loop body skewing / loop pipelining / loop shifting utility.Uday Bondhugula2019-03-291-0/+72
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