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authorUday Bondhugula <bondhugula@google.com>2018-10-22 13:44:31 -0700
committerjpienaar <jpienaar@google.com>2019-03-29 13:35:47 -0700
commitccfe5937155487263f5827a782ddd3f90ae50451 (patch)
treec3deebead3538bd744efacfe7773014014a73358 /mlir/lib/Transforms/PipelineDataTransfer.cpp
parenta03051b9c4ff1ce62ac19fd777fcdd81e21399e2 (diff)
downloadbcm5719-llvm-ccfe5937155487263f5827a782ddd3f90ae50451.tar.gz
bcm5719-llvm-ccfe5937155487263f5827a782ddd3f90ae50451.zip
PassResult return cleanup.
- return success as long as IR is in a valid state. PiperOrigin-RevId: 218225317
Diffstat (limited to 'mlir/lib/Transforms/PipelineDataTransfer.cpp')
-rw-r--r--mlir/lib/Transforms/PipelineDataTransfer.cpp22
1 files changed, 10 insertions, 12 deletions
diff --git a/mlir/lib/Transforms/PipelineDataTransfer.cpp b/mlir/lib/Transforms/PipelineDataTransfer.cpp
index 187205bb15a..91f3b845a98 100644
--- a/mlir/lib/Transforms/PipelineDataTransfer.cpp
+++ b/mlir/lib/Transforms/PipelineDataTransfer.cpp
@@ -114,9 +114,6 @@ static bool doubleBuffer(const MLValue *oldMemRef, ForStmt *forStmt) {
/// Returns false if this succeeds on at least one 'for' stmt.
PassResult PipelineDataTransfer::runOnMLFunction(MLFunction *f) {
- if (f->empty())
- return PassResult::Success;
-
// Do a post order walk so that inner loop DMAs are processed first. This is
// necessary since 'for' statements nested within would otherwise become
// invalid (erased) when the outer loop is pipelined (the pipelined one gets
@@ -213,7 +210,7 @@ PassResult PipelineDataTransfer::runOnForStmt(ForStmt *forStmt) {
auto mayBeConstTripCount = getConstantTripCount(*forStmt);
if (!mayBeConstTripCount.hasValue()) {
LLVM_DEBUG(llvm::dbgs() << "unknown trip count loop\n");
- return PassResult::Failure;
+ return success();
}
SmallVector<std::pair<OperationStmt *, OperationStmt *>, 4> startWaitPairs;
@@ -221,7 +218,7 @@ PassResult PipelineDataTransfer::runOnForStmt(ForStmt *forStmt) {
if (startWaitPairs.empty()) {
LLVM_DEBUG(llvm::dbgs() << "No dma start/finish pairs\n";);
- return failure();
+ return success();
}
// Double the buffers for the higher memory space memref's.
@@ -241,7 +238,8 @@ PassResult PipelineDataTransfer::runOnForStmt(ForStmt *forStmt) {
// that there are no uses outside.
LLVM_DEBUG(llvm::dbgs() << "double buffering failed for: \n";);
LLVM_DEBUG(dmaStartStmt->dump());
- return failure();
+ // IR still in a valid state.
+ return success();
}
}
@@ -252,7 +250,7 @@ PassResult PipelineDataTransfer::runOnForStmt(ForStmt *forStmt) {
dmaFinishStmt->getOperand(getTagMemRefPos(*dmaFinishStmt)));
if (!doubleBuffer(oldTagMemRef, forStmt)) {
LLVM_DEBUG(llvm::dbgs() << "tag double buffering failed\n";);
- return failure();
+ return success();
}
}
@@ -296,14 +294,14 @@ PassResult PipelineDataTransfer::runOnForStmt(ForStmt *forStmt) {
}
if (!isStmtwiseShiftValid(*forStmt, delays)) {
- // Violates SSA dominance.
- LLVM_DEBUG(llvm::dbgs() << "Dominance check failed\n";);
- return PassResult::Failure;
+ // Violates dependences.
+ LLVM_DEBUG(llvm::dbgs() << "Shifts invalid - unexpected\n";);
+ return success();
}
if (stmtBodySkew(forStmt, delays)) {
- LLVM_DEBUG(llvm::dbgs() << "stmt body skewing failed\n";);
- return PassResult::Failure;
+ LLVM_DEBUG(llvm::dbgs() << "stmt body skewing failed - unexpected\n";);
+ return success();
}
return success();
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