summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
* Strength Verifier checks around the types involved in a statepointPhilip Reames2014-12-031-6/+23
| | | | | | Add checks that the types in a gc.statepoint sequence match the wrapper callee and that relocating a pointer doesn't change it's type. llvm-svn: 223275
* correct spelling, NFCMatthias Braun2014-12-031-3/+3
| | | | llvm-svn: 223274
* [SimplifyLibCalls] Improve double->float shrinking to consider constantsMatthias Braun2014-12-032-14/+57
| | | | | | | | | | This allows cases like float x; fmin(1.0, x); to be optimized to fminf(1.0f, x); rdar://19049359 Differential Revision: http://reviews.llvm.org/D6496 llvm-svn: 223270
* [SimplifyLibCalls] Enable double to float shrinking for copysignMatthias Braun2014-12-032-0/+15
| | | | | | | | rdar://19049359 Differential Revision: http://reviews.llvm.org/D6495 llvm-svn: 223269
* [Hexagon] Converting member InstrDesc to static variable.Colin LeMahieu2014-12-034-22/+28
| | | | llvm-svn: 223268
* Fix grammar-o.Nico Weber2014-12-031-1/+1
| | | | llvm-svn: 223265
* [Hexagon] Converting subclass members to an implicit operand.Colin LeMahieu2014-12-033-24/+68
| | | | llvm-svn: 223264
* range-for some thingsDavid Blaikie2014-12-031-19/+12
| | | | llvm-svn: 223263
* Simplify CodeGenRegBank::inferMatchingSuperRegClass & its caller by passing ↵David Blaikie2014-12-032-18/+23
| | | | | | an iterator rather than index llvm-svn: 223262
* Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead ↵David Blaikie2014-12-036-110/+100
| | | | | | | | | | of vector<CodeGenRegisterClass*> This complicates a few algorithms due to not having random access, but not by a huge degree I don't think (open to debate/design discussion/etc). llvm-svn: 223261
* Range-for some stuff related to RegClasses, and comment cases where ↵David Blaikie2014-12-036-124/+124
| | | | | | range-for isn't suitable. llvm-svn: 223260
* Make the Verifier more strict about gc.statepointsPhilip Reames2014-12-031-28/+60
| | | | | | The recently added documentation for statepoints claimed that we checked the parameters of the various intrinsics for validity. This patch adds the code to actually do so. I also removed a couple of redundant checks for conditions which are checked elsewhere in the Verifier and simplified the logic using the helper functions from Statepoint.h. llvm-svn: 223259
* Add TableGen info for Power8.Will Schmidt2014-12-032-0/+395
| | | | | | | | This is based on the Power7 version, with units added and renamed to match P8. Differential Revision: http://reviews.llvm.org/D6358 llvm-svn: 223257
* Change the name to be in style.Roman Divacky2014-12-032-2/+2
| | | | llvm-svn: 223255
* Fix sphinx error from Statepoints.rstMatt Arsenault2014-12-031-0/+5
| | | | | | It was complaining it wasn't included in any toctree llvm-svn: 223254
* R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()Tom Stellard2014-12-031-1/+3
| | | | | | | This pass needs to be run after PrologEpilogInserter, because that pass may inserter spill code which reads or writes memory. llvm-svn: 223253
* R600/SI: Don't run SI passes on R600 subtargetsTom Stellard2014-12-031-1/+1
| | | | llvm-svn: 223252
* AArch64: fix wrong-endian parameter passing.Tim Northover2014-12-032-3/+21
| | | | | | | The blocked arguments code didn't take account of the hacks needed to support it. llvm-svn: 223247
* [NFC] Fixing pendantic warning extra semicolons.Colin LeMahieu2014-12-031-7/+7
| | | | llvm-svn: 223246
* [Hexagon] [NFC] Moving function implementations out of header. ↵Colin LeMahieu2014-12-032-79/+88
| | | | | | Clang-formatting files. llvm-svn: 223245
* Fix test to use the right metadata node (reapply r223239 plus a fix) and ↵Nick Lewycky2014-12-031-2/+2
| | | | | | also to use the correct path to the GCNO file. llvm-svn: 223244
* [Hexagon] [NFC] Renaming *packetStart to *packetBeginColin LeMahieu2014-12-033-11/+11
| | | | llvm-svn: 223243
* Revert r223239, which broke some bots.Alexander Potapenko2014-12-031-1/+1
| | | | llvm-svn: 223240
* Fix the metadata number used by llvm.gcov to match the number of the ↵Alexander Potapenko2014-12-031-1/+1
| | | | | | inserted metadata node. llvm-svn: 223239
* Silencing several "multiple copy constructors" warnings from MSVC; NFC.Aaron Ballman2014-12-031-1/+0
| | | | llvm-svn: 223238
* Silencing a 32-bit implicit conversion warning in MSVC; NFC.Aaron Ballman2014-12-031-1/+1
| | | | llvm-svn: 223237
* msan] Add compile-time checks for missing origins.Evgeniy Stepanov2014-12-031-10/+13
| | | | | | | | | | | | This change makes MemorySanitizer instrumentation a bit more strict about instructions that have no origin id assigned to them. This would have caught the bug that was fixed in r222918. This is re-commit of r222997, reverted in r223211, with 3 more missing origins added. llvm-svn: 223236
* InstCombine: simplify signed range checksErik Eckstein2014-12-033-0/+233
| | | | | | | | | Try to convert two compares of a signed range check into a single unsigned compare. Examples: (icmp sge x, 0) & (icmp slt x, n) --> icmp ult x, n (icmp slt x, 0) | (icmp sgt x, n) --> icmp ugt x, n llvm-svn: 223224
* [PowerPC] Print all inline-asm consts as signed numbersHal Finkel2014-12-032-13/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | Almost all immediates in PowerPC assembly (both 32-bit and 64-bit) are signed numbers, and it is important that we print them as such. To make sure that happens, we change PPCTargetLowering::LowerAsmOperandForConstraint so that it does all intermediate checks on a signed-extended int64_t value, and then creates the resulting target constant using MVT::i64. This will ensure that all negative values are printed as negative values (mirroring what is done in other backends to achieve the same sign-extension effect). This came up in the context of inline assembly like this: "add%I2 %0,%0,%2", ..., "Ir"(-1ll) where we used to print: addi 3,3,4294967295 and gcc would print: addi 3,3,-1 and gas accepts both forms, but our builtin assembler (correctly) does not. Now we print -1 like gcc does. While here, I replaced a bunch of custom integer checks with isInt<16> and friends from MathExtras.h. Thanks to Paul Hargrove for the bug report. llvm-svn: 223220
* Emit ABI_FP_rounding attribute.Charlie Turner2014-12-032-0/+28
| | | | | | | | | | | | LLVM understands a -enable-sign-dependent-rounding-fp-math codegen option. When the user has specified this option, the Tag_ABI_FP_rounding attribute should be emitted with value 1. This option currently does not appear to disable transformations and optimizations that assume default floating point rounding behavior, AFAICT, but the intention should be recorded in the build attributes, regardless of what the compiler actually does with the intention. Change-Id: If838578df3dc652b6f2796b8d152545674bcb30e llvm-svn: 223218
* Add tests for default value of Tag_ABI_FP_rounding.Charlie Turner2014-12-031-0/+48
| | | | | Change-Id: I051866d073fc6ce87ce3e693a3762da6d81f4393 llvm-svn: 223217
* Fix a typo in the documentation of LTOBenjamin Poulain2014-12-031-1/+1
| | | | | | | | Fix defininitions->definitions. Reviewed by David Blaikie. llvm-svn: 223216
* Ask the module for its the identified types.Rafael Espindola2014-12-038-7/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When lazy reading a module, the types used in a function will not be visible to a TypeFinder until the body is read. This patch fixes that by asking the module for its identified struct types. If a materializer is present, the module asks it. If not, it uses a TypeFinder. This fixes pr21374. I will be the first to say that this is ugly, but it was the best I could find. Some of the options I looked at: * Asking the LLVMContext. This could be made to work for gold, but not currently for ld64. ld64 will load multiple modules into a single context before merging them. This causes us to see types from future merges. Unfortunately, MappedTypes is not just a cache when it comes to opaque types. Once the mapping has been made, we have to remember it for as long as the key may be used. This would mean moving MappedTypes to the Linker class and having to drop the Linker::LinkModules static methods, which are visible from C. * Adding an option to ignore function bodies in the TypeFinder. This would fix the PR by picking the worst result. It would work, but unfortunately we are currently quite dependent on the upfront type merging. I will try to reduce our dependency, but it is not clear that we will be able to get rid of it for now. The only clean solution I could think of is making the Module own the types. This would have other advantages, but it is a much bigger change. I will propose it, but it is nice to have this fixed while that is discussed. With the gold plugin, this patch takes the number of types in the LTO clang binary from 52817 to 49669. llvm-svn: 223215
* ADT: Rename argument in emplace_back_implDuncan P. N. Exon Smith2014-12-031-2/+2
| | | | | | | Rename a functor argument in r223201 from `emplace` to `construct` to reduce confusion. llvm-svn: 223212
* Revert r222997. The newly added compile-time checks are finding missing ↵Nick Lewycky2014-12-031-10/+9
| | | | | | origins, testcase is being reduced and a PR will be posted shortly. llvm-svn: 223211
* LoopVectorize: Remove unnecessary RAUWDuncan P. N. Exon Smith2014-12-031-2/+0
| | | | | | | | | | Remove an unnecessary `MDNode::replaceAllUsesWith()`. In the preceding line, `TheLoop->setLoopID()` visits all backedges and sets the new loop ID. This sufficiently updates the loop metadata. Metadata RAUW is going away as part of PR21532. llvm-svn: 223210
* R600/SI: Fix SIFixSGPRCopies for copies to physical registersMatt Arsenault2014-12-031-1/+6
| | | | | | | This shows up when operands required to be passed in VCC are copied to. llvm-svn: 223208
* R600/SI: Remove incorrect assertionMatt Arsenault2014-12-031-5/+5
| | | | | | This can be a COPY to a physical register, such as VCC llvm-svn: 223207
* R600/SI: Remove i1 pseudo VALU opsMatt Arsenault2014-12-0310-124/+339
| | | | | | | | | | | | | | Select i1 logical ops directly to 64-bit SALU instructions. Vector i1 values are always really in SGPRs, with each bit for each item in the wave. This saves about 4 instructions when and/or/xoring any condition, and also helps write conditions that need to be passed in vcc. This should work correctly now that the SGPR live range fixing pass works. More work is needed to eliminate the VReg_1 pseudo regclass and possibly the entire SILowerI1Copies pass. llvm-svn: 223206
* R600/SI: Fix suspicious indexingMatt Arsenault2014-12-031-5/+7
| | | | | | | | The loop is over the operands of an instruction, and checks the register with the sub reg index of the dest register. This probably meant to be checking the sub reg index of the same operand. llvm-svn: 223205
* R600/SI: Fix running SILowerI1Copies a second timeMatt Arsenault2014-12-031-2/+1
| | | | llvm-svn: 223204
* R600/SI: Fix live range error hidden by SIFoldOperandsMatt Arsenault2014-12-031-0/+9
| | | | | | | | | | | | | | | m0 is treated as a virtual register class with a single register rather than the physical register it really is. This was updating the live range of the used virtual copy of m0 from the first ds_read instruction, and leaving the unused copy unchanged. This resulted in a "Live segment doesn't end at a valid instruction" verifier error because the erased instructions. Update the live range of the second copy (which should be dead). No test since I'm not sure how to trigger this with SIFoldOperands enabled. llvm-svn: 223203
* ADT: Add SmallVector<>::emplace_back(): fixupDuncan P. N. Exon Smith2014-12-031-1/+1
| | | | | | | Add missing `void` return type from `!LLVM_HAS_VARIADIC_TEMPLATES` case in r223201. llvm-svn: 223202
* ADT: Add SmallVector<>::emplace_back()Duncan P. N. Exon Smith2014-12-032-0/+176
| | | | llvm-svn: 223201
* StructurizeCFG: Use LoopInfo analysis for better loop detectionTom Stellard2014-12-032-1/+47
| | | | | | | | We were assuming that each back-edge in a region represented a unique loop, which is not always the case. We need to use LoopInfo to correctly determine which back-edges are loops. llvm-svn: 223199
* NVPTX: Delete dead codeDuncan P. N. Exon Smith2014-12-031-5/+0
| | | | | | `MDNode` does not inherit from `User`, and it never has a name. llvm-svn: 223198
* R600/SI: Enable inline assemblyTom Stellard2014-12-032-2/+12
| | | | | | | | We just needed to remove the assertion in AMDGPURegisterInfo::getFrameRegister(), which is called when initializing the parser for inline assembly. llvm-svn: 223197
* [OCaml] [cmake] Disable OCaml bindings if ctypes >=0.3 is not found.Peter Zotov2014-12-031-4/+8
| | | | llvm-svn: 223195
* R600/SI: Change mubuf offsets to print as decimalMatt Arsenault2014-12-0317-95/+95
| | | | | | This matches SC's behavior. llvm-svn: 223194
* Emit the entry block first and the exit block second, then all the blocks in ↵Nick Lewycky2014-12-032-3/+73
| | | | | | between afterwards. This is what gcc always does, and some out of tree tools depend on that. llvm-svn: 223193
OpenPOWER on IntegriCloud