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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-12-03 18:27:08 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-12-03 18:27:08 +0000 |
| commit | 05cd445c4da9c1bd7a2998c6a1e5bd097d6d65b3 (patch) | |
| tree | fe326ff353759b6100deacdb831d0b939e420e3a /llvm | |
| parent | 92105e87e88fa9db7ce1e85fcb7f1a3923f585c7 (diff) | |
| download | bcm5719-llvm-05cd445c4da9c1bd7a2998c6a1e5bd097d6d65b3.tar.gz bcm5719-llvm-05cd445c4da9c1bd7a2998c6a1e5bd097d6d65b3.zip | |
R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()
This pass needs to be run after PrologEpilogInserter, because
that pass may inserter spill code which reads or writes memory.
llvm-svn: 223253
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp index 8854e7b5093..08db0011e09 100644 --- a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -190,7 +190,6 @@ bool AMDGPUPassConfig::addPostRegAlloc() { if (ST.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) { addPass(createSIShrinkInstructionsPass()); - addPass(createSIInsertWaits(*TM)); } return false; } @@ -204,6 +203,9 @@ bool AMDGPUPassConfig::addPreSched2() { addPass(&IfConverterID); if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) addPass(createR600ClauseMergePass(*TM)); + if (ST.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) { + addPass(createSIInsertWaits(*TM)); + } return false; } |
