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* Machine Model (-schedmodel only). Added SchedAliases.Andrew Trick2012-09-223-87/+295
| | | | | | | Allow subtargets to tie SchedReadWrite types to processor specific sequences or variants. llvm-svn: 164451
* [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.Chad Rosier2012-09-211-2/+2
| | | | llvm-svn: 164420
* Whitespace.Chad Rosier2012-09-211-2/+2
| | | | llvm-svn: 164406
* Clarify comment.Dmitri Gribenko2012-09-211-1/+1
| | | | llvm-svn: 164371
* Add in new data types that are used by AMDIL/ANL among others.Micah Villmow2012-09-191-0/+8
| | | | llvm-svn: 164261
* Soften the pattern-can-never-match error in TableGen into a warning. This ↵Owen Anderson2012-09-191-2/+5
| | | | | | pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). llvm-svn: 164256
* Remove code for setting the VEX L-bit as a function of operand size from the ↵Craig Topper2012-09-192-19/+2
| | | | | | code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. llvm-svn: 164204
* SchedMachineModel: compress the CPU's WriteLatencyTable.Andrew Trick2012-09-193-7/+44
| | | | llvm-svn: 164199
* Iterate deterministicaly over ClassInfo*'sSean Silva2012-09-191-2/+12
| | | | | | | | Fixes an observed instance of nondeterministic TableGen output. Review by Jakob. llvm-svn: 164191
* Iterate deterministically over register classesSean Silva2012-09-191-2/+3
| | | | | | | | Fixes an observed instance of nondeterministic TableGen output. Review by Jakob. llvm-svn: 164190
* Refactor Record* by-ID comparator to Record.hSean Silva2012-09-192-18/+9
| | | | | | | | | | | This is a generally useful utility; there's no reason to have it hidden in CodeGenDAGPatterns.cpp. Also, rename it to fit the other comparators in Record.h Review by Jakob. llvm-svn: 164189
* FileCheck: Fix off-by-one bug that made CHECK-NOT: ignore the next character ↵Benjamin Kramer2012-09-181-2/+2
| | | | | | after the colon. llvm-svn: 164165
* Make custom operand parsing mnemonic indices use the same mnemonic table as ↵Craig Topper2012-09-181-34/+39
| | | | | | the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets. llvm-svn: 164109
* Use variable type for index into mnemonic table. Shrinks size of index field ↵Craig Topper2012-09-181-5/+14
| | | | | | on in tree targets. Saving static data space. llvm-svn: 164108
* Replaced ReInitMCSubtargetInfo with InitMCProcessor.Andrew Trick2012-09-181-1/+2
| | | | | | | | Now where we used to call ReInitMCSubtargetInfo, we actually recompute the same information as InitMCSubtargetInfo instead of only setting the feature bits. llvm-svn: 164105
* comment typoAndrew Trick2012-09-181-1/+1
| | | | llvm-svn: 164097
* TableGen subtarget emitter. Use getSchedClassIdx.Andrew Trick2012-09-182-11/+1
| | | | llvm-svn: 164096
* TableGen subtarget emitter. Generate resolveSchedClass generated hook for ↵Andrew Trick2012-09-181-0/+84
| | | | | | resolving instruction variants. llvm-svn: 164095
* TableGen subtarget emitter. Remove unnecessary header dependence.Andrew Trick2012-09-181-0/+1
| | | | llvm-svn: 164094
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine ↵Andrew Trick2012-09-181-6/+25
| | | | | | model. llvm-svn: 164092
* Mark asm matcher conversion table as const.Craig Topper2012-09-181-5/+5
| | | | llvm-svn: 164088
* Fix typo in comment. No functional change.Craig Topper2012-09-181-1/+1
| | | | llvm-svn: 164086
* Backout the wrong subtarget emitter fixAndrew Trick2012-09-171-1/+1
| | | | llvm-svn: 164078
* Fix release build after revertingAndrew Trick2012-09-171-2/+1
| | | | llvm-svn: 164075
* Revert r164061-r164067. Most of the new subtarget emitter.Andrew Trick2012-09-173-113/+20
| | | | | | | I have to work out the Target/CodeGen header dependencies before putting this back. llvm-svn: 164072
* InitMCProcessorAndrew Trick2012-09-171-1/+2
| | | | llvm-svn: 164066
* comment typoAndrew Trick2012-09-171-1/+1
| | | | llvm-svn: 164064
* TableGen subtarget emitter. Use getSchedClassIdx.Andrew Trick2012-09-172-11/+1
| | | | llvm-svn: 164063
* TableGen subtarget emitter. Generate resolveSchedClass generated hook for ↵Andrew Trick2012-09-171-0/+84
| | | | | | resolving instruction variants. llvm-svn: 164062
* TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine ↵Andrew Trick2012-09-171-7/+25
| | | | | | model. llvm-svn: 164061
* TableGen subtarget emitter. Format and emit data tables for the new machine ↵Andrew Trick2012-09-171-6/+117
| | | | | | model. llvm-svn: 164060
* TableGen subtarget emitter. Generate data tables for the new machine model.Andrew Trick2012-09-171-2/+291
| | | | | | | | | | | | Map the CodeGenSchedule object model onto data tables. The structure of the data tables is defined in MC, so for convenience we include MCSchedule.h. The alternative is maintaining a redundant copy of the table structure definitions. Mapping the object model onto data tables is sufficiently complicated that it should not be interleaved with emitting source code. This avoids major problem with the backend for itinerary generation. llvm-svn: 164059
* TableGen subtarget emitter. Emit processor resources for the new machine model.Andrew Trick2012-09-171-10/+63
| | | | llvm-svn: 164058
* TableGen subtarget parser: Add getProcResourcesIdx().Andrew Trick2012-09-171-0/+10
| | | | llvm-svn: 164057
* TableGen: Add initializer.Jim Grosbach2012-09-171-1/+1
| | | | | | | Keep GCC's warnings happy. It can't reason out that the state machine won't ever hit the potentially uninitialized use in OPC_FilterValue. llvm-svn: 164041
* Fix a few vars that can end up being used without initialization.Axel Naumann2012-09-171-1/+1
| | | | | | The cases where no initialization happens should still be checked for logic flaws. llvm-svn: 164032
* Fix typoMichael Liao2012-09-171-1/+1
| | | | llvm-svn: 164012
* Add 'virtual' keywoards to output file for overridden functions.Craig Topper2012-09-161-5/+6
| | | | llvm-svn: 164002
* Add 'virtual' keywoards to output file for overridden functions.Craig Topper2012-09-161-7/+7
| | | | llvm-svn: 163999
* Fix Doxygen issues: wrap code examples in \code and use \p to refer toDmitri Gribenko2012-09-151-4/+4
| | | | | | parameters. llvm-svn: 163984
* Revert r163878 as it breaks on targets with alternate register names. Such ↵Craig Topper2012-09-152-6/+4
| | | | | | targets do not exist in the main tree so this was not noticed. llvm-svn: 163959
* TableGen subtarget parser. Handle new machine model.Andrew Trick2012-09-152-0/+219
| | | | | | Collect processor resources from the subtarget defs. llvm-svn: 163953
* TableGen subtarget parser. Handle new machine model.Andrew Trick2012-09-152-0/+512
| | | | | | Infer SchedClasses from variants defined by the target or subtarget. llvm-svn: 163952
* TableGen subtarget parser. Handle new machine model.Andrew Trick2012-09-153-137/+816
| | | | | | Collect SchedClasses and SchedRW types from the subtarget defs. llvm-svn: 163951
* Allow the second opcode info table to be 8, 16, or 32-bits as needed to ↵Craig Topper2012-09-141-38/+32
| | | | | | represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands. llvm-svn: 163880
* Reduce size of register name index tables by using uint16_t for all in tree ↵Craig Topper2012-09-142-4/+6
| | | | | | targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead. llvm-svn: 163878
* AsmWriterEmitter: OpInfo2 should be unsigned 16-bit.Manman Ren2012-09-131-1/+1
| | | | | | Fix an issue in r163814. llvm-svn: 163837
* AsmWriterEmitter: increase the number of bits for OpcodeInfo from 32-bit toManman Ren2012-09-131-11/+46
| | | | | | | | | | | 48-bit if necessary, in order to reduce the generated code size. We have 900 cases not covered by OpcodeInfo in ATT AsmWriter and more in Intel AsmWriter and ARM AsmWriter. This patch reduced the clang Release build size by 50k, running on a Mac Pro. llvm-svn: 163814
* Fix Doxygen issues:Dmitri Gribenko2012-09-132-20/+21
| | | | | | | | * wrap code blocks in \code ... \endcode; * refer to parameter names in paragraphs correctly (\arg is not what most people want -- it starts a new paragraph). llvm-svn: 163790
* Add a new compression type to ModRM table that detects when the memory modRM ↵Craig Topper2012-09-131-2/+15
| | | | | | byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. llvm-svn: 163774
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