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authorCraig Topper <craig.topper@gmail.com>2012-09-19 06:37:45 +0000
committerCraig Topper <craig.topper@gmail.com>2012-09-19 06:37:45 +0000
commit3f23c1a8b9d9600aed05f8f360e4bd20bdc87984 (patch)
treede011220f1b501f76667d7f72d32e74b6c610ef4 /llvm/utils
parent88ec52d5808f36366e832a2d61b192714713a062 (diff)
downloadbcm5719-llvm-3f23c1a8b9d9600aed05f8f360e4bd20bdc87984.tar.gz
bcm5719-llvm-3f23c1a8b9d9600aed05f8f360e4bd20bdc87984.zip
Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L.
llvm-svn: 164204
Diffstat (limited to 'llvm/utils')
-rw-r--r--llvm/utils/TableGen/X86RecognizableInstr.cpp16
-rw-r--r--llvm/utils/TableGen/X86RecognizableInstr.h5
2 files changed, 2 insertions, 19 deletions
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp
index 4b12279cdd0..24155c0a5a6 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.cpp
+++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp
@@ -244,7 +244,7 @@ RecognizableInstr::RecognizableInstr(DisassemblerTables &tables,
IsSSE = (HasOpSizePrefix && (Name.find("16") == Name.npos)) ||
(Name.find("CRC32") != Name.npos);
HasFROperands = hasFROperands();
- HasVEX_LPrefix = has256BitOperands() || Rec->getValueAsBit("hasVEX_L");
+ HasVEX_LPrefix = Rec->getValueAsBit("hasVEX_L");
// Check for 64-bit inst which does not require REX
Is32Bit = false;
@@ -479,20 +479,6 @@ bool RecognizableInstr::hasFROperands() const {
return false;
}
-bool RecognizableInstr::has256BitOperands() const {
- const std::vector<CGIOperandList::OperandInfo> &OperandList = *Operands;
- unsigned numOperands = OperandList.size();
-
- for (unsigned operandIndex = 0; operandIndex < numOperands; ++operandIndex) {
- const std::string &recName = OperandList[operandIndex].Rec->getName();
-
- if (!recName.compare("VR256")) {
- return true;
- }
- }
- return false;
-}
-
void RecognizableInstr::handleOperand(bool optional, unsigned &operandIndex,
unsigned &physicalOperandIndex,
unsigned &numPhysicalOperands,
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.h b/llvm/utils/TableGen/X86RecognizableInstr.h
index 1668957234b..9feb3c3c7d3 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.h
+++ b/llvm/utils/TableGen/X86RecognizableInstr.h
@@ -127,10 +127,7 @@ private:
/// hasFROperands - Returns true if any operand is a FR operand.
bool hasFROperands() const;
-
- /// has256BitOperands - Returns true if any operand is a 256-bit SSE operand.
- bool has256BitOperands() const;
-
+
/// typeFromString - Translates an operand type from the string provided in
/// the LLVM tables to an OperandType for use in the operand specifier.
///
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