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* Use SequenceToOffsetTable to create instruction name table. Saves space ↵Craig Topper2012-04-011-9/+16
| | | | | | particularly on X86 where AVX instructions just add a 'v' to the front of other instructions. llvm-svn: 153841
* Emit the LLVM<->DWARF register mapping as a sorted table and use binary ↵Benjamin Kramer2012-04-012-43/+146
| | | | | | | | | | | | | | | search to do the lookup. This also avoids emitting the information twice, which led to code bloat. On i386-linux-Release+Asserts with all targets built this change shaves a whopping 1.3 MB off clang. The number is probably exaggerated by recent inliner changes but the methods were already enormous with the old inline cost computation. The DWARF reg -> LLVM reg mapping doesn't seem to have holes in it, so it could be a simple lookup table. I didn't implement that optimization yet to avoid potentially changing functionality. There is still some duplication both in tablegen and the generated code that should be cleaned up eventually. llvm-svn: 153837
* comment typoAndrew Trick2012-03-311-1/+1
| | | | llvm-svn: 153796
* Introduce Register Units: Give each leaf register a number.Andrew Trick2012-03-312-0/+60
| | | | | | | | First small step toward modeling multi-register multi-pressure. In the future, register units can also be used to model liveness and aliasing. llvm-svn: 153794
* Rip out emission of the regIsInRegClass function for the asm printer.Benjamin Kramer2012-03-302-68/+3
| | | | | | It's slow, bloated and completely redundant with MCRegisterClass::contains. llvm-svn: 153782
* Use SequenceToOffsetTable in emitRegisterNameString.Jakob Stoklund Olesen2012-03-302-8/+28
| | | | | | This allows suffix sharing in register names. (AX is a suffix of EAX). llvm-svn: 153777
* Reapply 153764 and 153761 with a fix.Jakob Stoklund Olesen2012-03-302-103/+80
| | | | | | | | | Use an explicit comparator instead of the default. The sets are sorted, but not using the default comparator. Hopefully, this will unbreak the Linux builders. llvm-svn: 153772
* Revert 153764 and 153761. They broke a --enable-optimized --enable-assertionsRafael Espindola2012-03-302-79/+103
| | | | | | --enable-expensive-checks build. llvm-svn: 153771
* Compress SimpleValueType lists by sharing.Jakob Stoklund Olesen2012-03-302-22/+17
| | | | | | Many register classes have the same value types. Share the table space. llvm-svn: 153764
* Compress register lists by sharing suffixes.Jakob Stoklund Olesen2012-03-301-81/+62
| | | | | | | | TableGen emits lists of sub-registers, super-registers, and overlaps. Put them all in a single table and use a SequenceToOffsetTable to share suffixes. llvm-svn: 153761
* Add a SequenceToOffsetTable to TableGen.Jakob Stoklund Olesen2012-03-301-0/+123
| | | | | | | | This is similar to the StringToOffsetTable we use to produce string tables, but it can be used for other sequences than strings, and it eliminates entries for suffixes. llvm-svn: 153760
* Add more constness to CodeGenRegisters.Jakob Stoklund Olesen2012-03-293-7/+7
| | | | llvm-svn: 153667
* Spill DPair registers, not just QPR.Jakob Stoklund Olesen2012-03-281-0/+1
| | | | | | | | | The arm_neon intrinsics can create virtual registers from the DPair register class which allows both even-odd and odd-even D-register pairs. This fixes PR12389. llvm-svn: 153603
* fix a failure path to print the right thing, part of PR12357Chris Lattner2012-03-261-1/+1
| | | | llvm-svn: 153457
* TableGen: Don't emit the llvm intrinsic -> gcc builtin table, its only user ↵Benjamin Kramer2012-03-262-21/+0
| | | | | | was the c backend. llvm-svn: 153432
* Include cstdio in a few place that depended on getting it transitively ↵Benjamin Kramer2012-03-232-1/+3
| | | | | | through StringExtras.h llvm-svn: 153328
* Reserve number of MI operands to accom,odate complex patterns.Evan Cheng2012-03-201-1/+4
| | | | llvm-svn: 153125
* More const-correcting of FixedLenDecoderEmitter.Craig Topper2012-03-161-13/+17
| | | | llvm-svn: 152906
* Const-correct the FixedLenDecoderEmitter. Pass a few things by const ↵Craig Topper2012-03-162-57/+62
| | | | | | reference instead of value to avoid some copying. llvm-svn: 152899
* Spacing fixes. Mostly aligning arguments that spilled onto next line with ↵Craig Topper2012-03-161-37/+36
| | | | | | the opening parenthese instead of 2 spaces in. llvm-svn: 152889
* Remove unused field NumVariable from Filter class. Even it was needed the ↵Craig Topper2012-03-161-9/+3
| | | | | | same result could be found with VariableInstructions.size(). Also fix some typos in comments. llvm-svn: 152885
* Make MnemonicTable const again. That part of r152202 was OK.Jakob Stoklund Olesen2012-03-151-4/+4
| | | | llvm-svn: 152840
* Don't assume all mnemonics fit in 64k.Jakob Stoklund Olesen2012-03-151-2/+2
| | | | | | | We currently assume that all targets have less than 64k opcodes. We shouldn't limit it further. llvm-svn: 152833
* Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."Jakob Stoklund Olesen2012-03-154-28/+16
| | | | | | | | We cannot limit the concatenated instruction names to 64K. ARM is already at 32K, and it is easy to imagine a target with more instructions. llvm-svn: 152817
* Revert r152105: "Use uint16_t to store indices into string table"Jakob Stoklund Olesen2012-03-151-5/+5
| | | | | | | | | | | This patch limited the concatenated register names to 64K which meant that the total number of registers was many times less than 64K. If any compilers actually enforce the 64K limit on string literals, and it turns out to be a problem, we should fix that problem by not using long string literals. llvm-svn: 152816
* Remove unused field from FixedLenDecoderEmitter. Move NumberedInstructions ↵Craig Topper2012-03-132-5/+3
| | | | | | declaration from class to run method since its only used there and was being reinitialized anyway. llvm-svn: 152616
* DFAPacketizerEmitter: Prune includes.Benjamin Kramer2012-03-122-4/+0
| | | | llvm-svn: 152581
* Convert more static tables of registers used by calling convention to ↵Craig Topper2012-03-111-3/+3
| | | | | | uint16_t to reduce space. llvm-svn: 152538
* Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to ↵Craig Topper2012-03-111-5/+5
| | | | | | reduce size of static tables. llvm-svn: 152524
* Fix the x86 disassembler to at least print the lock prefix if it is the firstKevin Enderby2012-03-091-3/+3
| | | | | | | prefix. Added a FIXME to remind us this still does not work when it is not the first prefix. llvm-svn: 152414
* TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask.NAKAMURA Takumi2012-03-091-1/+1
| | | | | | ~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF. llvm-svn: 152407
* Use uint16_t to store instruction implicit uses and defs. Reduces static data.Craig Topper2012-03-081-1/+1
| | | | llvm-svn: 152301
* Re-commit r152202 hopefully fixing the MSVC linker error.Craig Topper2012-03-084-16/+28
| | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152296
* Revert r152202 as it's causing internal buildbot failures.Chad Rosier2012-03-074-27/+15
| | | | | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152233
* Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to ↵Craig Topper2012-03-074-15/+27
| | | | | | protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152202
* ARM more NEON VLD/VST composite physical register refactoring.Jim Grosbach2012-03-061-1/+1
| | | | | | Register pair, all lanes subscripting. llvm-svn: 152157
* ARM refactor more NEON VLD/VST instructions to use composite physregsJim Grosbach2012-03-061-1/+1
| | | | | | | Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the pseudos as a result. llvm-svn: 152150
* Fix support for encodings up to 64-bits in length. TableGen was silently ↵Owen Anderson2012-03-061-6/+6
| | | | | | truncating them to 32-bits prior to this. llvm-svn: 152148
* Use uint16_t to store indices into string table since C++ only allows 64K ↵Craig Topper2012-03-061-5/+5
| | | | | | string literals so the index into the big string can never be larger than that. llvm-svn: 152105
* Add asserts to ensure that values will fit into the tables.Craig Topper2012-03-061-1/+16
| | | | llvm-svn: 152104
* Nuke a bit of dead code.Jim Grosbach2012-03-051-2/+0
| | | | llvm-svn: 152067
* ARM Refactor VLD/VST spaced pair instructions.Jim Grosbach2012-03-051-2/+1
| | | | | | Use the new composite physical registers. llvm-svn: 152063
* ARM refactor away a bunch of VLD/VST pseudo instructions.Jim Grosbach2012-03-051-0/+1
| | | | | | | | | With the new composite physical registers to represent arbitrary pairs of DPR registers, we don't need the pseudo-registers anymore. Get rid of a bunch of them that use DPR register pairs and just use the real instructions directly instead. llvm-svn: 152045
* Shrink and reorder fields in MCRegisterClass to reduce size of static data.Craig Topper2012-03-051-5/+5
| | | | llvm-svn: 152019
* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper2012-03-051-7/+7
| | | | | | static data size. llvm-svn: 152016
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-2/+2
| | | | llvm-svn: 152001
* Use uint16_t instead of unsigned to store registers in reg classes. Reduces ↵Craig Topper2012-03-041-11/+11
| | | | | | static data size. llvm-svn: 151998
* Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper2012-03-041-2/+2
| | | | | | size of static data. llvm-svn: 151996
* Use uint8_t instead of enums to store values in X86 disassembler table. ↵Craig Topper2012-03-041-8/+8
| | | | | | Shaves 150k off the size of X86DisassemblerDecoder.o llvm-svn: 151995
* Perform the string table optimization for OperandMatchEntries too.Benjamin Kramer2012-03-031-10/+28
| | | | llvm-svn: 151986
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