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path: root/llvm/unittests/Support/TargetParserTest.cpp
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* [ARM] Rename HW div feature to HW div Thumb. NFCI.Diana Picus2017-04-201-45/+52
| | | | | | | | | | | | | | | | The hardware div feature refers only to Thumb, but because of its name it is tempting to use it to check for hardware division in general, which may cause problems in ARM mode. See https://reviews.llvm.org/D32005. This patch adds "Thumb" to its name, to make its scope clear. One notable place where I haven't made the change is in the feature flag (used with -mattr), which is still hwdiv. Changing it would also require changes in a lot of tests, including clang tests, and it doesn't seem like it's worth the effort. Differential Revision: https://reviews.llvm.org/D32160 llvm-svn: 300827
* [AArch64] Vulcan is now ThunderXT99Joel Jones2017-03-071-3/+4
| | | | | | | | | | | | | | | | | Broadcom Vulcan is now Cavium ThunderX2T99. LLVM Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32113 Minor fixes for the alignments of loops and functions for ThunderX T81/T83/T88 (better performance). Patch was tested with SpecCPU2006. Patch by Stefan Teleman Differential Revision: https://reviews.llvm.org/D30510 llvm-svn: 297190
* [AArch64] Add Cavium ThunderX supportJoel Jones2017-02-171-0/+24
| | | | | | | | | | | | | | This set of patches adds support for Cavium ThunderX ARM64 processors: * ThunderX * ThunderX T81 * ThunderX T83 * ThunderX T88 Patch by Stefan Teleman Differential Revision: https://reviews.llvm.org/D28891 llvm-svn: 295475
* [ARM] Add support for armv7ve triple in llvm (PR31358).George Burgess IV2017-02-091-17/+21
| | | | | | | | | | | | | | | Gcc supports target armv7ve which is armv7-a with virtualization extensions. This change adds support for this in llvm for gcc compatibility. Also remove redundant FeatureHWDiv, FeatureHWDivARM for a few models as this is specified automatically by FeatureVirtualization. Patch by Manoj Gupta. Differential Revision: https://reviews.llvm.org/D29472 llvm-svn: 294661
* [ARM] Enable Cortex-M23 and Cortex-M33 support.Javed Absar2017-02-011-0/+4
| | | | | | | | | | | | | Add both cores to the target parser and TableGen. Test that eabi attributes are set correctly for both cores. Additionally, test the absence and presence of MOVT in Cortex-M23 and Cortex-M33, respectively. Committed on behalf of Sanne Wouda. Reviewers : rengolin, olista01. Differential Revision: https://reviews.llvm.org/D29073 llvm-svn: 293761
* Add support for Samsung Exynos M3 (NFC)Evandro Menezes2016-12-131-0/+8
| | | | llvm-svn: 289613
* Refactor TargetParserTests.Zijiao Ma2016-12-061-346/+498
| | | | | | | The TargetParser tests are a bit redundant. Refactor them in a more repeatable way. llvm-svn: 288758
* [AArch64] Add support for Qualcomm's Falkor CPU.Chad Rosier2016-11-151-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D26673 llvm-svn: 287036
* [AArch64] Refactor test per Matthias' request.Chad Rosier2016-11-151-3/+9
| | | | llvm-svn: 287031
* [ARM]: Add Cortex-R52 target to LLVMJaved Absar2016-10-071-2/+2
| | | | | | | This patch adds Cortex-R52, the new ARM real-time processor, to LLVM. Cortex-R52 implements the ARMv8-R architecture. llvm-svn: 283542
* Use StringReg in TargetParser APIs (NFC)Mehdi Amini2016-10-071-8/+8
| | | | llvm-svn: 283527
* Fix TargetParser unit tests for ARM / AArch64.Zachary Turner2016-08-051-4/+13
| | | | | | | | String pooling is not guaranteed by the standard, so if you're comparing two different string literals for equality, you have to use strcmp. llvm-svn: 277831
* [AArch64] Add support for Samsung Exynos M2 (NFC).Evandro Menezes2016-08-011-3/+4
| | | | llvm-svn: 277364
* Fix some sign compare warnings breaking the -Werror buildDavid Blaikie2016-07-281-2/+2
| | | | llvm-svn: 277040
* Removed unused variablesSimon Pilgrim2016-07-281-12/+0
| | | | llvm-svn: 276975
* Fix signed/unsigned warning.Simon Pilgrim2016-07-281-6/+6
| | | | llvm-svn: 276974
* Remove two tests added in r276957.Daniel Jasper2016-07-281-18/+0
| | | | | | | | These loop from 0 to AEK_XSCALE, which is currently defined as 0x80000000, and thus the tests loop over the entire int range, which is unreasonable and also too slow in debug builds. llvm-svn: 276969
* R276957 broke bot clang-ppc64be-linux-multistage,try to fix it.Zijiao Ma2016-07-281-4/+4
| | | | llvm-svn: 276966
* Add unittests to {ARM | AArch64}TargetParser.Zijiao Ma2016-07-281-17/+502
| | | | | | | | | | | | | | Add unittest to {ARM | AArch64}TargetParser,and by the way correct problems as below: 1.Correct a incorrect indexing problem in AArch64TargetParser. The architecture enumeration is shared across ARM and AArch64 in original implementation.But In the code,I just used the index which was offset by the ARM, and this would index into the array incorrectly. To make AArch64 has its own arch enum,or we will do a lot of slowly iterating. 2.Correct a spelling error. The parameter of llvm::AArch64::getArchExtName. 3.Correct a writing mistake, in llvm::ARM::parseArchISA. Differential Revision: https://reviews.llvm.org/D21785 llvm-svn: 276957
* Support: correct AArch64 TargetParser implementationSaleem Abdulrasool2016-06-081-0/+41
| | | | | | | | | | | | | | | | | | | | | | | The architecture enumeration is shared across ARM and AArch64. However, the data is not. The code incorrectly would index into the array using the architecture index which was offset by the ARMv7 architecture enumeration. We do not have a marker for indicating the architectural family to which the enumeration belongs so we cannot be clever about offsetting the index (at least it is not immediately apparent to me). Instead, fall back to the tried-and-true method of slowly iterating the array (its not a large array, so the impact of this is not too high). Because of the incorrect indexing, if we were lucky, we would crash, but usually we would return an invalid StringRef. We did not have any tests for the AArch64 target parser previously;. Extend the previous tests I had added for ARM to cover AArch64 for ensuring that we return expected StringRefs. Take the opportunity to change some iterator types to references. This work is needed to support parsing `.arch name` directives in the AArch64 target asm parser. llvm-svn: 272145
* unitests: add some ARM TargetParser testsSaleem Abdulrasool2016-03-061-0/+51
The ARM TargetParser would construct invalid StringRefs. This would cause asserts to trigger. Add some tests in LLVM to ensure that we dont regress on this in the future. Although there is a test for this in clang, this ensures that the changes would get caught in the same repository. llvm-svn: 262790
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