| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [llvm-mca] Move llvm-mca library to llvm/lib/MCA. | Clement Courbet | 2018-12-17 | 20 | -3203/+0 |
| * | [llvm-mca] Speedup the default resource selection strategy. | Andrea Di Biagio | 2018-11-30 | 1 | -15/+28 |
| * | [llvm-mca] Simplify code in class Scheduler. NFCI | Andrea Di Biagio | 2018-11-30 | 2 | -6/+6 |
| * | [llvm-mca][MC] Add the ability to declare which processor resources model loa... | Andrea Di Biagio | 2018-11-29 | 2 | -2/+19 |
| * | Reapply "[llvm-mca] Return the total number of cycles from method Pipeline::r... | Andrea Di Biagio | 2018-11-28 | 1 | -3/+3 |
| * | Revert [llvm-mca] Return the total number of cycles from method Pipeline::run(). | Andrea Di Biagio | 2018-11-28 | 1 | -2/+2 |
| * | [llvm-mca] Return the total number of cycles from method Pipeline::run(). | Andrea Di Biagio | 2018-11-28 | 1 | -2/+2 |
| * | [llvm-mca] Add support for instructions with a variadic number of operands. | Andrea Di Biagio | 2018-11-25 | 1 | -18/+81 |
| * | [llvm-mca] InstrBuilder: warnings for call/ret instructions are only reported... | Andrea Di Biagio | 2018-11-24 | 1 | -3/+6 |
| * | [llvm-mca] Refactor some of the logic in InstrBuilder, and add a verifyOperan... | Andrea Di Biagio | 2018-11-23 | 1 | -75/+116 |
| * | [llvm-mca] LSUnit: use a SmallSet to model load/store queues. NFCI | Andrea Di Biagio | 2018-11-22 | 1 | -20/+27 |
| * | [llvm-mca] Use a SmallVector instead of std::vector to track register reads/w... | Andrea Di Biagio | 2018-11-22 | 1 | -2/+5 |
| * | [llvm-mca] Fix an invalid memory read introduced by r346487. | Andrea Di Biagio | 2018-11-22 | 2 | -9/+28 |
| * | [llvm-mca] Correctly update the resource strategy for processor resources wit... | Andrea Di Biagio | 2018-11-12 | 1 | -1/+7 |
| * | [llvm-mca] Account for buffered resources when analyzing "Super" resources. | Andrea Di Biagio | 2018-11-09 | 1 | -1/+28 |
| * | [llvm-mca] Use a small vector for instructions in the EntryStage. | Andrea Di Biagio | 2018-11-09 | 2 | -7/+11 |
| * | [llvm-mca] PR39261: Rename FetchStage to EntryStage. | Andrea Di Biagio | 2018-11-08 | 3 | -11/+11 |
| * | [llvm-mca] Add extra counters for move elimination in view RegisterFileStatis... | Andrea Di Biagio | 2018-11-01 | 2 | -20/+38 |
| * | [llvm-mca] Move namespace mca inside llvm:: | Fangrui Song | 2018-10-30 | 18 | -26/+36 |
| * | [llvm-mca] Lower to mca::Instructon before the pipeline is run. | Andrea Di Biagio | 2018-10-29 | 3 | -13/+10 |
| * | [llvm-mca] Introduce a new base class for mca::Instruction, and change how re... | Andrea Di Biagio | 2018-10-25 | 4 | -29/+28 |
| * | [llvm-mca] Removed a couple of redundant method declarations, and simplified ... | Andrea Di Biagio | 2018-10-25 | 1 | -0/+8 |
| * | [llvm-mca] Replace InstRef::isValid with operator bool. NFC. | Matt Davis | 2018-10-24 | 5 | -16/+11 |
| * | [llvm-mca] Simplify the logic in FetchStage. NFCI | Andrea Di Biagio | 2018-10-24 | 2 | -21/+17 |
| * | [llvm-mca] Remove dependency from InstrBuilder in class InstructionTables. | Andrea Di Biagio | 2018-10-24 | 2 | -3/+1 |
| * | [llvm-mca] [llvm-mca] Improved error handling and error reporting from class ... | Andrea Di Biagio | 2018-10-24 | 1 | -36/+23 |
| * | [llvm-mca] Use llvm::ArrayRef in class SourceMgr. NFCI | Andrea Di Biagio | 2018-10-22 | 1 | -1/+1 |
| * | Use llvm::{all,any,none}_of instead std::{all,any,none}_of. NFC | Fangrui Song | 2018-10-19 | 1 | -7/+6 |
| * | [llvm-mca] Correctly set aliases for register writes introduced by optimized ... | Andrea Di Biagio | 2018-10-12 | 2 | -15/+65 |
| * | [tblgen][llvm-mca] Add the ability to describe move elimination candidates vi... | Andrea Di Biagio | 2018-10-12 | 2 | -6/+10 |
| * | [tblgen][CodeGenSchedule] Add a check for invalid RegisterFile definitions wi... | Andrea Di Biagio | 2018-10-11 | 1 | -6/+4 |
| * | [llvm-mca] Minor refactoring in preparation for a patch that will fully fix P... | Andrea Di Biagio | 2018-10-10 | 1 | -7/+9 |
| * | [llvm-mca] Move field 'AllowZeroMoveEliminationOnly' to class RegisterFile. NFC. | Andrea Di Biagio | 2018-10-04 | 1 | -1/+19 |
| * | [llvm-mca] Check for inconsistencies when constructing instruction descriptors. | Andrea Di Biagio | 2018-10-04 | 2 | -2/+36 |
| * | [llvm-mca] Add support for move elimination in class RegisterFile. | Andrea Di Biagio | 2018-10-03 | 4 | -0/+81 |
| * | [llvm-mca] Constify the 'notify' routines. NFC. | Matt Davis | 2018-10-02 | 3 | -9/+11 |
| * | [MCA] Remove SM.hasNext() call in FetchStage::execute. | Owen Rodley | 2018-10-02 | 1 | -1/+1 |
| * | [llvm-mca] Rename the 'Subtract' method to 'subtract' | Matt Davis | 2018-10-01 | 1 | -1/+1 |
| * | [llvm-mca] Remove redundant namespace prefixes. NFC | Andrea Di Biagio | 2018-09-28 | 8 | -37/+36 |
| * | [llvm-mca] Teach how to track zero registers in class RegisterFile. | Andrea Di Biagio | 2018-09-28 | 1 | -11/+34 |
| * | llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...) | Fangrui Song | 2018-09-27 | 2 | -5/+4 |
| * | [llvm-mca] Improve code comments in LSUnit.{h, cpp}. NFC | Andrea Di Biagio | 2018-09-24 | 1 | -1/+11 |
| * | [MCA] Remove dependency on CodeGen. | Dean Michael Berris | 2018-09-21 | 3 | -3/+1 |
| * | [TableGen][SubtargetEmitter] Add the ability for processor models to describe... | Andrea Di Biagio | 2018-09-19 | 1 | -5/+25 |
| * | [llvm-mca] Add the ability to mark register reads/writes associated with dep-... | Andrea Di Biagio | 2018-09-18 | 4 | -25/+24 |
| * | [llvm-mca] Slightly refactor class InstRef. NFC. | Andrea Di Biagio | 2018-09-18 | 1 | -1/+1 |
| * | Revert r342148 (and follow-on fix attempts r342154, r342180, r342182, r342193) | Nico Weber | 2018-09-15 | 1 | -4/+8 |
| * | Renovate CMake files in the `llvm-(cfi-verify|exegesis|mca)` tools. | Richard Diamond | 2018-09-13 | 1 | -8/+4 |
| * | [llvm-mca] Delay calculation of Cycles per Resources, separate the cycles and... | Matt Davis | 2018-09-11 | 4 | -15/+16 |
| * | [llvm-mca] Fix typo in debug output. NFC. | Matt Davis | 2018-09-01 | 1 | -1/+1 |
