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| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-11-08 17:49:30 +0000 | 
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-11-08 17:49:30 +0000 | 
| commit | d66f4e472a04b79f13b065eb6b5276545d723c1b (patch) | |
| tree | d1a90094fada7f020e48aad1652c589215768060 /llvm/tools/llvm-mca/lib | |
| parent | 3c1f4903b77752aa6fb820e32715a824b4e82ead (diff) | |
| download | bcm5719-llvm-d66f4e472a04b79f13b065eb6b5276545d723c1b.tar.gz bcm5719-llvm-d66f4e472a04b79f13b065eb6b5276545d723c1b.zip  | |
[llvm-mca] PR39261: Rename FetchStage to EntryStage.
This fixes PR39261.
FetchStage is a misnomer. It causes confusion with the frontend fetch stage,
which we don't currently simulate.  I decided to rename it into EntryStage
mainly because this is meant to be a "source" stage for all pipelines.
Differential Revision: https://reviews.llvm.org/D54268
llvm-svn: 346419
Diffstat (limited to 'llvm/tools/llvm-mca/lib')
| -rw-r--r-- | llvm/tools/llvm-mca/lib/CMakeLists.txt | 2 | ||||
| -rw-r--r-- | llvm/tools/llvm-mca/lib/Context.cpp | 4 | ||||
| -rw-r--r-- | llvm/tools/llvm-mca/lib/Stages/EntryStage.cpp (renamed from llvm/tools/llvm-mca/lib/Stages/FetchStage.cpp) | 16 | 
3 files changed, 11 insertions, 11 deletions
diff --git a/llvm/tools/llvm-mca/lib/CMakeLists.txt b/llvm/tools/llvm-mca/lib/CMakeLists.txt index 359a7d49d49..21b6e34cc7e 100644 --- a/llvm/tools/llvm-mca/lib/CMakeLists.txt +++ b/llvm/tools/llvm-mca/lib/CMakeLists.txt @@ -14,8 +14,8 @@ add_library(LLVMMCA    Instruction.cpp    Pipeline.cpp    Stages/DispatchStage.cpp +  Stages/EntryStage.cpp    Stages/ExecuteStage.cpp -  Stages/FetchStage.cpp    Stages/InstructionTables.cpp    Stages/RetireStage.cpp    Stages/Stage.cpp diff --git a/llvm/tools/llvm-mca/lib/Context.cpp b/llvm/tools/llvm-mca/lib/Context.cpp index 5b6f52478dd..6774a57d29b 100644 --- a/llvm/tools/llvm-mca/lib/Context.cpp +++ b/llvm/tools/llvm-mca/lib/Context.cpp @@ -20,8 +20,8 @@  #include "HardwareUnits/RetireControlUnit.h"  #include "HardwareUnits/Scheduler.h"  #include "Stages/DispatchStage.h" +#include "Stages/EntryStage.h"  #include "Stages/ExecuteStage.h" -#include "Stages/FetchStage.h"  #include "Stages/RetireStage.h"  namespace llvm { @@ -40,7 +40,7 @@ Context::createDefaultPipeline(const PipelineOptions &Opts, InstrBuilder &IB,    auto HWS = llvm::make_unique<Scheduler>(SM, LSU.get());    // Create the pipeline stages. -  auto Fetch = llvm::make_unique<FetchStage>(SrcMgr); +  auto Fetch = llvm::make_unique<EntryStage>(SrcMgr);    auto Dispatch = llvm::make_unique<DispatchStage>(STI, MRI, Opts.DispatchWidth,                                                     *RCU, *PRF);    auto Execute = llvm::make_unique<ExecuteStage>(*HWS); diff --git a/llvm/tools/llvm-mca/lib/Stages/FetchStage.cpp b/llvm/tools/llvm-mca/lib/Stages/EntryStage.cpp index 6e91dd6121d..929d51e824c 100644 --- a/llvm/tools/llvm-mca/lib/Stages/FetchStage.cpp +++ b/llvm/tools/llvm-mca/lib/Stages/EntryStage.cpp @@ -1,4 +1,4 @@ -//===---------------------- FetchStage.cpp ----------------------*- C++ -*-===// +//===---------------------- EntryStage.cpp ----------------------*- C++ -*-===//  //  //                     The LLVM Compiler Infrastructure  // @@ -13,21 +13,21 @@  ///  //===----------------------------------------------------------------------===// -#include "Stages/FetchStage.h" +#include "Stages/EntryStage.h"  #include "Instruction.h"  namespace llvm {  namespace mca { -bool FetchStage::hasWorkToComplete() const { return CurrentInstruction; } +bool EntryStage::hasWorkToComplete() const { return CurrentInstruction; } -bool FetchStage::isAvailable(const InstRef & /* unused */) const { +bool EntryStage::isAvailable(const InstRef & /* unused */) const {    if (CurrentInstruction)      return checkNextStage(CurrentInstruction);    return false;  } -void FetchStage::getNextInstruction() { +void EntryStage::getNextInstruction() {    assert(!CurrentInstruction && "There is already an instruction to process!");    if (!SM.hasNext())      return; @@ -38,7 +38,7 @@ void FetchStage::getNextInstruction() {    SM.updateNext();  } -llvm::Error FetchStage::execute(InstRef & /*unused */) { +llvm::Error EntryStage::execute(InstRef & /*unused */) {    assert(CurrentInstruction && "There is no instruction to process!");    if (llvm::Error Val = moveToTheNextStage(CurrentInstruction))      return Val; @@ -49,13 +49,13 @@ llvm::Error FetchStage::execute(InstRef & /*unused */) {    return llvm::ErrorSuccess();  } -llvm::Error FetchStage::cycleStart() { +llvm::Error EntryStage::cycleStart() {    if (!CurrentInstruction)      getNextInstruction();    return llvm::ErrorSuccess();  } -llvm::Error FetchStage::cycleEnd() { +llvm::Error EntryStage::cycleEnd() {    // Find the first instruction which hasn't been retired.    const InstMap::iterator It =        llvm::find_if(Instructions, [](const InstMap::value_type &KeyValuePair) {  | 

