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* test/CodeGen/PowerPC/vector.ll: Tweak redirection >%t >%t to >%t >>%t. See ↵NAKAMURA Takumi2011-07-111-1/+1
| | | | | | also r134814 (test/CodeGen/X86/vector.ll). llvm-svn: 134900
* Add a missing test for r134882.Cameron Zwarich2011-07-111-0/+8
| | | | llvm-svn: 134889
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-1/+2
| | | | | | | | | | | | and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. llvm-svn: 134884
* Don't duplicate the work done by a gep into a "bitcast" if the gep hasRafael Espindola2011-07-111-0/+16
| | | | | | | | more than one use. Fixes PR10322. llvm-svn: 134883
* Move the loads after the calls so that the fix forRafael Espindola2011-07-091-48/+48
| | | | | | | PR10292 doesn't show that the loads don't alias the allocas. llvm-svn: 134852
* Use CHECK-NEXT.Rafael Espindola2011-07-091-259/+260
| | | | llvm-svn: 134850
* Remove tests for APIs that were removed.Nick Lewycky2011-07-093-131/+2
| | | | llvm-svn: 134842
* Land the long talked about "type system rewrite" patch. ThisChris Lattner2011-07-0941-231/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | patch brings numerous advantages to LLVM. One way to look at it is through diffstat: 109 files changed, 3005 insertions(+), 5906 deletions(-) Removing almost 3K lines of code is a good thing. Other advantages include: 1. Value::getType() is a simple load that can be CSE'd, not a mutating union-find operation. 2. Types a uniqued and never move once created, defining away PATypeHolder. 3. Structs can be "named" now, and their name is part of the identity that uniques them. This means that the compiler doesn't merge them structurally which makes the IR much less confusing. 4. Now that there is no way to get a cycle in a type graph without a named struct type, "upreferences" go away. 5. Type refinement is completely gone, which should make LTO much MUCH faster in some common cases with C++ code. 6. Types are now generally immutable, so we can use "Type *" instead "const Type *" everywhere. Downsides of this patch are that it removes some functions from the C API, so people using those will have to upgrade to (not yet added) new API. "LLVM 3.0" is the right time to do this. There are still some cleanups pending after this, this patch is large enough as-is. llvm-svn: 134829
* more tests not making the jump into the brave new world.Chris Lattner2011-07-0916-1522/+0
| | | | llvm-svn: 134820
* remove some crufy old tests that aren't adding much valueChris Lattner2011-07-0910-194/+0
| | | | llvm-svn: 134819
* remove a test that doesn't make sense in the new world.Chris Lattner2011-07-091-6/+0
| | | | llvm-svn: 134818
* test/CodeGen/X86/vector.ll: Tweak temporary output to appease Win32 hosts.NAKAMURA Takumi2011-07-091-1/+1
| | | | | | | | With Lit (not bash) in a test, multiple redirects >%t might open(%t, "w") multiple. It can be avoided if latter redirect is >>%t. It might work even if ">/dev/null" were used. llvm-svn: 134814
* Added test cases for GVN signed intrinsics recognition, r134777.Lang Hames2011-07-091-0/+38
| | | | llvm-svn: 134778
* Hoist spills within a basic block.Jakob Stoklund Olesen2011-07-091-0/+35
| | | | | | | | | | Try to move spills as early as possible in their basic block. This can help eliminate interferences by shortening the live range being spilled. This fixes PR10221. llvm-svn: 134776
* Add support for ARM / Thumb mode switching with .code 16 and .code 32.Evan Cheng2011-07-081-0/+16
| | | | llvm-svn: 134760
* Fix broken x86_64 tests which specify non-64-bit cpu's.Evan Cheng2011-07-083-4/+4
| | | | llvm-svn: 134756
* Default 64-bit target features and SSE2 on when a triple specifies x86-64. ↵Eli Friedman2011-07-081-1/+1
| | | | | | Clean up all the other hacks which are now unnecessary. llvm-svn: 134753
* Make tBX_RET and tBX_RET_vararg predicable.Jim Grosbach2011-07-084-9/+14
| | | | | | | | | | The normal tBX instruction is predicable, so there's no reason the pseudos for using it as a return shouldn't be. Gives us some nice code-gen improvements as can be seen by the test changes. In particular, several tests now have to disable if-conversion because it works too well and defeats the test. llvm-svn: 134746
* Add _allrem, _aullrem and _allmul to the runtime for MSVC.Julien Lerouge2011-07-081-0/+19
| | | | | | http://llvm.org/bugs/show_bug.cgi?id=10305 llvm-svn: 134744
* Add an intrinsic and codegen support for fused multiply-accumulate. The intentCameron Zwarich2011-07-081-0/+33
| | | | | | is to use this for architectures that have a native FMA instruction. llvm-svn: 134742
* Be more aggressive about following hints.Jakob Stoklund Olesen2011-07-086-14/+19
| | | | | | | | | | | | | | | | | | | | RAGreedy::tryAssign will now evict interference from the preferred register even when another register is free. To support this, add the EvictionCost struct that counts how many hints are broken by an eviction. We don't want to break one hint just to satisfy another. Rename canEvict to shouldEvict, and add the first bit of eviction policy that doesn't depend on spill weights: Always make room in the preferred register as long as the evictees can be split and aren't already assigned to their preferred register. Also make the CSR avoidance more accurate. When looking for a cheaper register it is OK to use a new volatile register. Only CSR aliases that have never been used before should be avoided. llvm-svn: 134735
* Use ARMPseudoExpand for ARM tail calls.Jim Grosbach2011-07-081-11/+11
| | | | llvm-svn: 134719
* Emit a more efficient magic number multiplication for exact sdivs.Benjamin Kramer2011-07-081-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building. struct foo { char x[24]; }; long bar(struct foo *a, struct foo *b) { return a-b; } is now compiled into movl 4(%esp), %eax subl 8(%esp), %eax sarl $3, %eax imull $-1431655765, %eax, %eax instead of movl 4(%esp), %eax subl 8(%esp), %eax movl $715827883, %ecx imull %ecx movl %edx, %eax shrl $31, %eax sarl $2, %edx addl %eax, %edx movl %edx, %eax llvm-svn: 134695
* Make GVN look through extractvalues for recognised intrinsics. GVN can then ↵Lang Hames2011-07-081-0/+47
| | | | | | CSE ops that match values produced by the intrinsics. llvm-svn: 134677
* Fix more register allocation sensitive tests.Jakob Stoklund Olesen2011-07-083-8/+8
| | | | llvm-svn: 134667
* Remove a test that no longer makes sense.Jakob Stoklund Olesen2011-07-081-121/+0
| | | | | | | | | | | | It was testing a linear scan feature: Test if linearscan is unfavoring registers for allocation to allow more reuse of reloads from stack slots. The greedy register allocator doesn't access any stack slots in this function, so the linear scan feature was not being tested. llvm-svn: 134666
* Let the inline asm 'q' constraint match float, and on 64-bit double too.Nick Lewycky2011-07-081-1/+13
| | | | | | Fixes PR9602! llvm-svn: 134665
* Go ahead and emit the barrier on x86-64 even without sse2. TheEric Christopher2011-07-081-0/+15
| | | | | | | | processor supports it just fine. Fixes PR9675 and rdar://9740801 llvm-svn: 134664
* Add support for the X86 'l' constraint.Eric Christopher2011-07-071-0/+7
| | | | | | Fixes PR10149 and rdar://9738585 llvm-svn: 134648
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-075-6/+6
| | | | llvm-svn: 134641
* Change some ARM subtarget features to be single bit yes/no in order to sink ↵Evan Cheng2011-07-0720-37/+37
| | | | | | them down to MC layer. Also fix tests. llvm-svn: 134590
* Added a testcase for PR10220.Lang Hames2011-07-071-0/+15
| | | | llvm-svn: 134573
* indvars -disable-iv-rewrite: Added SimplifyCongruentIVs.Andrew Trick2011-07-062-4/+55
| | | | llvm-svn: 134530
* LICM: Do not loose alignment on promotionTobias Grosser2011-07-061-0/+26
| | | | | | | | The promotion code lost any alignment information, when hoisting loads and stores out of the loop. This lead to incorrect aligned memory accesses. We now use the largest alignment we can prove to be correct. llvm-svn: 134520
* Introduce "expect" intrinsic instructions.Jakub Staszak2011-07-063-0/+477
| | | | llvm-svn: 134516
* Update MC/ELF/relocation.s with change to X86 PUSH64i8 in r134501.Kevin Enderby2011-07-061-5/+5
| | | | llvm-svn: 134511
* Changed the X86 PUSH64i8 record to use the i64i8imm ParserMatchClass so that aKevin Enderby2011-07-061-0/+6
| | | | | | push with a small constant produces a 2-byte push. llvm-svn: 134501
* Revert r134366 and add an explicit triple to make this test host-independent.Dan Gohman2011-07-051-4/+4
| | | | llvm-svn: 134447
* Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, ↵Eli Friedman2011-07-051-0/+16
| | | | | | use proper aliases for the pclmullqlqdq and friends. PR10269. llvm-svn: 134424
* Fix PR10277.Jakob Stoklund Olesen2011-07-051-0/+101
| | | | | | | | | | | | | | | Remat during spilling triggers dead code elimination. If a phi-def becomes unused, that may also cause live ranges to split into separate connected components. This type of splitting is different from normal live range splitting. In particular, there may not be a common original interval. When the split range is its own original, make sure that the new siblings are also their own originals. The range being split cannot be used as an original since it doesn't cover the new siblings. llvm-svn: 134413
* PR10267: Don't combine an equality compare with an AND into an inequality ↵Benjamin Kramer2011-07-041-0/+12
| | | | | | | | compare when the AND has more than one use. This can pessimize code, inequalities are generally more expensive. llvm-svn: 134379
* test/CodeGen/X86/lsr-nonaffine.ll: Relax expressions for Win64 CC to appease ↵NAKAMURA Takumi2011-07-031-3/+3
| | | | | | Win32 hosts. llvm-svn: 134366
* FileCheck-ize another test. Reduces the llc invocations from 8 to 1, andChandler Carruth2011-07-021-8/+41
| | | | | | | makes one of the tests actually mean something (as the string 'add' will always appear in the output of this file). llvm-svn: 134358
* Avoid writing to an arbitrary filename during the test run by writing toChandler Carruth2011-07-021-8/+8
| | | | | | a file descriptor. llvm-svn: 134355
* FileCheck-ize another X86 test, making it more precisely verify theChandler Carruth2011-07-021-13/+24
| | | | | | desired result based on the comments in the file. llvm-svn: 134354
* Quote two greps which contain parentheses.Chandler Carruth2011-07-022-2/+2
| | | | llvm-svn: 134353
* FileCheck-ize and simplify RUN lines.Chandler Carruth2011-07-021-4/+3
| | | | llvm-svn: 134352
* FileCheck-izeChandler Carruth2011-07-021-1/+6
| | | | llvm-svn: 134351
* FileCheck-ize and tighten up assertions to only check the relevant sections.Chandler Carruth2011-07-021-3/+11
| | | | llvm-svn: 134350
* FileCheck-ize and cleanup IR.Chandler Carruth2011-07-021-5/+9
| | | | llvm-svn: 134349
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