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* [X86] Teach combineInsertSubvector how to combine some k-register ↵Craig Topper2018-02-101-11/+5
| | | | | | insert_subvectors and extract_subvector sequences to remove extra zeroing.wq llvm-svn: 324791
* REQUIRES: shell a couple of tests that require the shellDavid Blaikie2018-02-102-0/+2
| | | | | | | | One test uses diff, the other tries to change the PATH which doesn't seem to work well ('not' is no longer accessible/found after the PATH is changed - I think $PATH isn't expanded when setting PATH). llvm-svn: 324787
* [LV] Fix analyzeInterleaving when -pass-remarks enabledMircea Trofin2018-02-101-0/+43
| | | | | | | | | | | | | | | | | | | | | | | Summary: If -pass-remarks=loop-vectorize, atomic ops will be seen by analyzeInterleaving(), even though canVectorizeMemory() == false. This is because we are requesting extra analysis instead of bailing out. In such a case, we end up with a Group in both Load- and StoreGroups, and then we'll try to access freed memory when traversing LoadGroups after having had released the Group when iterating over StoreGroups. The fix is to include mayWriteToMemory() when validating that two instructions are the same kind of memory operation. Reviewers: mssimpso, davidxl Reviewed By: davidxl Subscribers: hsaito, fhahn, llvm-commits Differential Revision: https://reviews.llvm.org/D43064 llvm-svn: 324786
* [llvm-objcopy] Make modifications in-place if output is not specifiedAlexander Shaposhnikov2018-02-091-0/+29
| | | | | | | | | | | | | | If the output file is not specified make the modifications in-place (like binutils objcopy does). In particular, this fixes the behavior of Clang -gsplit-dwarf (if Clang is configured to use llvm-objcopy), previously it was creating .dwo files, but still leaving *dwo* sections in the original binary. Test plan: make check-all Differential revision: https://reviews.llvm.org/D42873 llvm-svn: 324783
* [X86] Teach lower1BitVectorShuffle to recognize shuffles that are just ↵Craig Topper2018-02-091-14/+8
| | | | | | | | filling upper elements with zero. Replace with insert_subvector. There's still some extra kshifts in one of the modified test cases here, but hopefully that's only a DAG combine away. llvm-svn: 324782
* [WebAssembly] Add mechanisms for specifying an explicit import module name.Dan Gohman2018-02-092-1/+27
| | | | | | | | | | | | | | | | | | | | This adds a wasm-import-module function attribute and a .import_module assembler directive, for specifying module import names for WebAssembly. Currently these may only be used for function symbols; global variables may be considered in the future. WebAssembly has a two-level namespace scheme for symbols, and it's normally the linker's job to assign the module name, which is the first-level name. The attributes here allow users to specify their own module names explicitly, which is useful for tools generating bindings to modules defined in other languages. This feature is not fully usable yet. It will evolve along with the ongoing symbol table and lld changes. Differential Revision: https://reviews.llvm.org/D42520 llvm-svn: 324778
* [X86][MC] Fix assembling rip-relative addressing + immediate displacementsFrancis Visoiu Mistrih2018-02-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the rare case where the input contains rip-relative addressing with immediate displacements, *and* the instruction ends with an immediate, we encode the instruction in the wrong way: movl $12345678, 0x400(%rdi) // all good, no rip-relative addr movl %eax, 0x400(%rip) // all good, no immediate at the end of the instruction movl $12345678, 0x400(%rip) // fails, encodes address as 0x3fc(%rip) Offset is a label: movl $12345678, foo(%rip) we want to account for the size of the immediate (in this case, $12345678, 4 bytes). Offset is an immediate: movl $12345678, 0x400(%rip) we should not account for the size of the immediate, assuming the immediate offset is what the user wanted. Differential Revision: https://reviews.llvm.org/D43050 llvm-svn: 324772
* [WebAssebmly] Report undefined symbols correctly in objdumpSam Clegg2018-02-092-14/+14
| | | | | | | | | | | | | | Peviously we were reporting undefined symbol as being defined by the IMPORT sections. This change reports undefined symbols in the same that other formats do, and also removes the need to store the section with each symbol (since it can be derived from the symbol type). Differential Revision: https://reviews.llvm.org/D43101 llvm-svn: 324770
* [Utils] Salvage debug info from dead 'or' instructionsVedant Kumar2018-02-091-0/+44
| | | | | | | | | | | Extend salvageDebugInfo to preserve the debug info from a dead 'or' with a constant. Patch by Ismail Badawi! Differential Revision: https://reviews.llvm.org/D43129 llvm-svn: 324764
* [Hexagon] Add code to select QTRUE and QFALSEKrzysztof Parzyszek2018-02-091-0/+29
| | | | | | Fixes http://llvm.org/PR36320. llvm-svn: 324763
* [tablegen] Fixed few !foreach evaluation issues.Artem Belevich2018-02-091-0/+72
| | | | | | | | | | | | | | * !foreach on lists didn't evaluate operands of the RHS operator. This made nested operators silently fail. * A typo in the code could result in a wrong value substituted for an operation which produced a false '!foreach requires an operator' error. * Keep recursion over the DAG within ForeachHelper. This simplifies things a bit as we no longer need to pass the Type around in order to prevent recursion. Differential Revision: https://reviews.llvm.org/D43083 llvm-svn: 324758
* [ThinLTO] Teach ThinLTO about auto hide symbolsSteven Wu2018-02-092-1/+11
| | | | | | | | | | | | | | | | | | Summary: For symbols that has linkonce_odr linkage and unnamed_addr, it can be auto hide by linker to avoid weak external symbols. Teach ThinLTO to perform auto hide so it can safely promote linkonce_odr to weak symbols without breaking this nice property. Reviewers: tejohnson, mehdi_amini Reviewed By: tejohnson Subscribers: inglorion, eraman, rnk, pcc, llvm-commits Differential Revision: https://reviews.llvm.org/D43130 llvm-svn: 324757
* [x86] remove duplicate undef tests; NFCSanjay Patel2018-02-094-79/+0
| | | | | | | These are incomplete and were made redundant with the consolidation in: https://reviews.llvm.org/rL324678 llvm-svn: 324754
* [InstCombine] Add vector xor testsSimon Pilgrim2018-02-091-0/+323
| | | | | | This doesn't cover everything in InstCombiner.visitXor yet, but increases coverage for a lot of tests llvm-svn: 324753
* Emit smaller exception tables for non-SJLJ mode.Rafael Espindola2018-02-099-30/+28
| | | | | | | | | | | * Use uleb128 for code offsets in the LSDA call site table. * Omit the TTBase offset if the type table is empty. This change can reduce the size of the DWARF/Itanium LSDA by about half. Patch by Ryan Prichard! llvm-svn: 324750
* Use assembler expressions to lay out the EH LSDA.Rafael Espindola2018-02-095-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rely on the assembler to finalize the layout of the DWARF/Itanium exception-handling LSDA. Rather than calculate the exact size of each thing in the LSDA, use assembler directives: To emit the offset to the TTBase label: .uleb128 .Lttbase0-.Lttbaseref0 .Lttbaseref0: To emit the size of the call site table: .uleb128 .Lcst_end0-.Lcst_begin0 .Lcst_begin0: ... call site table entries ... .Lcst_end0: To align the type info table: ... action table ... .balign 4 .long _ZTIi .long _ZTIl .Lttbase0: Using assembler directives simplifies the compiler and allows switching the encoding of offsets in the call site table from udata4 to uleb128 for a large code size savings. (This commit does not change the encoding.) The combination of the uleb128 followed by a balign creates an unfortunate dependency cycle that the assembler must sometimes resolve either by padding an LEB or by inserting zero padding before the type table. See PR35809 or GNU as bug 4029. Patch by Ryan Prichard! llvm-svn: 324749
* Reapply "AMDGPU: Add 32-bit constant address space"Matt Arsenault2018-02-091-0/+288
| | | | | | This reverts r324494 and reapplies r324487. llvm-svn: 324747
* Pre-emptively fix test case for windows path separatorsDavid Blaikie2018-02-091-1/+1
| | | | llvm-svn: 324740
* Remove some unnecessary REQUIRES: shell from a couple of llvm-symbolizer testsDavid Blaikie2018-02-092-2/+0
| | | | llvm-svn: 324738
* [Hexagon] Express calling conventions via .td file instead of hand-codingKrzysztof Parzyszek2018-02-092-5/+5
| | | | | | Additionally, simplify the rest of the argument/parameter lowering code. llvm-svn: 324737
* [DebugInfo] Don't insert DEBUG_VALUE after terminatorsStefan Maksimovic2018-02-092-2/+2
| | | | | | | | | | | | | | r314974 introduced insertion of DEBUG_VALUEs after each redefinition of debug value register in the slot index range. In case the instruction redefining the debug value register was a terminator, machine verifier would complain since it enforces the rule of no non-terminator instructions following the first terminator. Differential Revision: https://reviews.llvm.org/D42801 llvm-svn: 324734
* [SelectionDAG] Provide adequate register class for RegisterSDNodeStefan Maksimovic2018-02-092-15/+20
| | | | | | | | | | When adding operands to machine instructions in case of RegisterSDNodes, generate a COPY node in case the register class does not match the one in the instruction definition. Differental Revision: https://reviews.llvm.org/D35561 llvm-svn: 324733
* [ELF] Print the .type assembly directive correctly for STT_NOTYPEOliver Stannard2018-02-091-0/+17
| | | | | | | | | | The llvm assembly parser and gas both accept "@notype" in the .type assembly directive, but we were printing it as "@no_type", which isn't accepted by either assembler. Differential revision: https://reviews.llvm.org/D43116 llvm-svn: 324731
* [mips] UnXFAIL gprestore.ll test.Simon Dardis2018-02-091-14/+207
| | | | | | | Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
* [InstCombine] Add constant vector support for X udiv C, where C >= signbitSimon Pilgrim2018-02-092-5/+8
| | | | llvm-svn: 324728
* [AArch64] Return true in enableMultipleCopyHints().Jonas Paulsson2018-02-094-28/+26
| | | | | | | | | | Enable multiple COPY hints to eliminate more COPYs during register allocation. Note that this is something all targets should do, see https://reviews.llvm.org/D38128. Review: Martin Storsjö llvm-svn: 324720
* [bugpoint] Report non-existent opt binaryVedant Kumar2018-02-091-0/+2
| | | | | | | | Bugpoint will keep going even if the opt binary it's given doesn't exist. It should at least alert the user, so it's clear why reductions are failing. llvm-svn: 324713
* LTO: Include live bit in ThinLTO cache key.Peter Collingbourne2018-02-091-0/+18
| | | | | | | | | | As of r323633, this bit started controlling whether symbol definitions appear in object files, and it also became sensitive to the prevailing bit, so it needs to be included in the key. Differential Revision: https://reviews.llvm.org/D43109 llvm-svn: 324711
* [X86] Simplify some code in lowerV4X128VectorShuffle and ↵Craig Topper2018-02-091-48/+51
| | | | | | | | lowerV2X128VectorShuffle Previously we extracted two subvectors and concatenate. But the concatenate will be lowered to two insert subvectors. Then DAG combine will merge once of the inserts and one of the extracts back into the original vector. We might as well just directly use one extract and one insert. llvm-svn: 324710
* [X86] Teach shuffle lowering to recognize 128/256 bit insertions into a zero ↵Craig Topper2018-02-094-24/+16
| | | | | | | | vector. This regresses a couple cases in the shuffle combining test. But those cases use intrinsics that InstCombine knows how to turn into a generic shuffle earlier. This should give opportunities to fold this earlier in InstCombine or DAG combine. llvm-svn: 324709
* [X86] Add 512-bit shuffle test cases for concatenating 128/256-bits with ↵Craig Topper2018-02-091-0/+34
| | | | | | | | zeros in the upper portion. We should recognize this and just use a mov that will zero the upper bits. llvm-svn: 324708
* [bugpoint] Avoid noisy errors by passing a valid opt to testsVedant Kumar2018-02-097-9/+9
| | | | | | | If the tests don't use the in-tree opt, we're liable to see some silly error messages due to the version mismatch (missing flags, etc). llvm-svn: 324703
* DebugInfo/llvm-symbolizer: Test symbolizing Split DWARF without addresses in ↵David Blaikie2018-02-093-0/+20
| | | | | | | | | the skeleton CU Identified in an llvm-dev discussion around DWARFUnit::collectAddressRanges llvm-svn: 324702
* Make test changes added in r324584 more robust by using a regex instead of ↵Douglas Yung2018-02-096-66/+66
| | | | | | hard coded MCInst numbers. llvm-svn: 324699
* [GISel]: Verify COPIES involving generic registers.Aditya Nandakumar2018-02-098-12/+78
| | | | | | | | | | | | Add verification for copies involving generic registers if they are compatible - ie if it is a generic copy, then the types are the same, and if a COPY b/w generic and target virtual register, then the sizes should be the same. Only checks if there are no sub registers involved for now. https://reviews.llvm.org/D37775 llvm-svn: 324696
* [CodeGen] Unify the syntax of MBB liveins in MIR and -debug outputFrancis Visoiu Mistrih2018-02-091-6/+6
| | | | | | | | | | | Instead of: Live Ins: %r0 %r1 print: liveins: %r0, %r1 llvm-svn: 324694
* [x86] Add test cases to demonstrate some dumb mask->gpr->mask transition ↵Craig Topper2018-02-092-0/+112
| | | | | | sequences. llvm-svn: 324693
* [hwasan] Fix kernel instrumentation of stack.Evgeniy Stepanov2018-02-091-0/+29
| | | | | | | | | | | | | | | Summary: Kernel addresses have 0xFF in the most significant byte. A tag can not be pushed there with OR (tag << 56); use AND ((tag << 56) | 0x00FF..FF) instead. Reviewers: kcc, andreyknvl Subscribers: srhines, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D42941 llvm-svn: 324691
* [CodeGen] Unify the syntax of MBB successors in MIR and -debug outputFrancis Visoiu Mistrih2018-02-0915-41/+41
| | | | | | | | | | | Instead of: Successors according to CFG: %bb.6(0x12492492 / 0x80000000 = 14.29%) print: successors: %bb.6(0x12492492); %bb.6(14.29%) llvm-svn: 324685
* [x86] consolidate and add tests for undef binop folds; NFCSanjay Patel2018-02-085-140/+434
| | | | | | | As was already shown in the div/rem tests and noted in PR36305, the behavior is inconsistent, but it's not limited to div/rem only. llvm-svn: 324678
* Use a stable topological sort in DwarfCompileUnit::createScopeChildrenDIE()Adrian Prantl2018-02-083-8/+211
| | | | | | | | | | | | This addresses review feedback for D42940. The topological sort is slightly more expensive but it can now also detect cycles in the dependencies and actually works correctly. rdar://problem/37217988 Differential Review: https://reviews.llvm.org/D43036 llvm-svn: 324677
* Minor tweak to test case.Dmitry Mikulin2018-02-081-1/+0
| | | | llvm-svn: 324670
* [DWARFv5] Fix dumper to show the file table starts at index 0.Paul Robinson2018-02-086-16/+16
| | | | | | | | Emitting the correct (root of compilation) file at index 0 will be posted for review later; I wanted to get this minor change out of the way first. llvm-svn: 324669
* AMDGPU: Minor cleanupsMatt Arsenault2018-02-081-1/+1
| | | | | | Column limit, typo, unnecessary reference llvm-svn: 324666
* [GlobalISel][X86] Fixing failures after https://reviews.llvm.org/D37775Alexander Ivchenko2018-02-0817-654/+1041
| | | | | | | | | | | | | | The patch essentially makes sure that X86CallLowering adds proper G_COPY/G_TRUNC and G_ANYEXT/G_COPY when we are doing lowering of arguments/returns for floating point values passed on registers. Tests are updated accordingly Reviewed By: qcolombet Differential Revision: https://reviews.llvm.org/D42287 llvm-svn: 324665
* [GlobalIsel][X86] Making {G_IMPLICIT_DEF, s128} legalAlexander Ivchenko2018-02-081-0/+22
| | | | | | | | | | | The patch is a split from D42287 and is related to fixing failures after https://reviews.llvm.org/D37775 Reviewed By: qcolombet Differential Revision: https://reviews.llvm.org/D42287 llvm-svn: 324664
* [X86] Improve combineCastedMaskArithmetic to fold (bitcast (vXi1 (and/or/xor ↵Craig Topper2018-02-083-28/+13
| | | | | | | | X, C)))->(vXi1 (and/or/xor (bitcast X), (bitcast C)) where C is a constant build_vector. Most vxi1 constant build vectors have to be implemented in the scalar domain anyway so we'll probably end up with a cast there later. But by then its too late to do the combine to get rid of it. llvm-svn: 324662
* [X86] Add DAG combine to constant fold a bitcast of a vXi1 constant ↵Craig Topper2018-02-088-444/+312
| | | | | | build_vector into a scalar integer. llvm-svn: 324661
* [ThinLTO] Skip BlockAddresses while replacing uses in function import.Dmitry Mikulin2018-02-082-0/+32
| | | | | | Differential Revision: https://reviews.llvm.org/D43027 llvm-svn: 324658
* Parameterize a test.Paul Robinson2018-02-081-10/+10
| | | | llvm-svn: 324657
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