[x86] remove duplicate undef tests; NFC

These are incomplete and were made redundant with the consolidation in:
https://reviews.llvm.org/rL324678

llvm-svn: 324754

4 files changed, 0 insertions, 79 deletions

diff --git a/llvm/test/CodeGen/X86/combine-mul.ll b/llvm/test/CodeGen/X86/combine-mul.ll
index f021788e245..4a0d3df969d 100644
--- a/llvm/test/CodeGen/X86/combine-mul.ll
+++ b/llvm/test/CodeGen/X86/combine-mul.ll
@@ -2,32 +2,6 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
 
-; fold (mul undef, x) -> 0
-define <4 x i32> @combine_vec_mul_undef0(<4 x i32> %x) {
-; SSE-LABEL: combine_vec_mul_undef0:
-; SSE:       # %bb.0:
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_vec_mul_undef0:
-; AVX:       # %bb.0:
-; AVX-NEXT:    retq
-  %1 = mul <4 x i32> undef, %x
-  ret <4 x i32> %1
-}
-
-; fold (mul x, undef) -> 0
-define <4 x i32> @combine_vec_mul_undef1(<4 x i32> %x) {
-; SSE-LABEL: combine_vec_mul_undef1:
-; SSE:       # %bb.0:
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: combine_vec_mul_undef1:
-; AVX:       # %bb.0:
-; AVX-NEXT:    retq
-  %1 = mul <4 x i32> %x, undef
-  ret <4 x i32> %1
-}
-
 ; fold (mul x, 0) -> 0
 define <4 x i32> @combine_vec_mul_zero(<4 x i32> %x) {
 ; SSE-LABEL: combine_vec_mul_zero:
diff --git a/llvm/test/CodeGen/X86/combine-shl.ll b/llvm/test/CodeGen/X86/combine-shl.ll
index 33e871766a0..4184de12a3c 100644
--- a/llvm/test/CodeGen/X86/combine-shl.ll
+++ b/llvm/test/CodeGen/X86/combine-shl.ll
@@ -3,24 +3,6 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-SLOW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX-FAST
 
-; fold (shl undef, x) -> 0
-define i32 @combine_shl_undef0(i32 %x) {
-; CHECK-LABEL: combine_shl_undef0:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    retq
-  %1 = shl i32 undef, %x
-  ret i32 %1
-}
-
-define <4 x i32> @combine_vec_shl_undef0(<4 x i32> %x) {
-; CHECK-LABEL: combine_vec_shl_undef0:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    retq
-  %1 = shl <4 x i32> undef, %x
-  ret <4 x i32> %1
-}
-
 ; fold (shl 0, x) -> 0
 define <4 x i32> @combine_vec_shl_zero(<4 x i32> %x) {
 ; SSE-LABEL: combine_vec_shl_zero:
diff --git a/llvm/test/CodeGen/X86/combine-sra.ll b/llvm/test/CodeGen/X86/combine-sra.ll
index b51c1e635b5..4fa58e2aae1 100644
--- a/llvm/test/CodeGen/X86/combine-sra.ll
+++ b/llvm/test/CodeGen/X86/combine-sra.ll
@@ -3,23 +3,6 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-SLOW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-FAST
 
-; fold (sra undef, x) -> undef
-define i32 @combine_lshr_undef0(i32 %x) {
-; CHECK-LABEL: combine_lshr_undef0:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    retq
-  %1 = ashr i32 undef, %x
-  ret i32 %1
-}
-
-define <4 x i32> @combine_vec_ashr_undef0(<4 x i32> %x) {
-; CHECK-LABEL: combine_vec_ashr_undef0:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    retq
-  %1 = ashr <4 x i32> undef, %x
-  ret <4 x i32> %1
-}
-
 ; fold (sra 0, x) -> 0
 define <4 x i32> @combine_vec_ashr_zero(<4 x i32> %x) {
 ; SSE-LABEL: combine_vec_ashr_zero:
diff --git a/llvm/test/CodeGen/X86/combine-srl.ll b/llvm/test/CodeGen/X86/combine-srl.ll
index 6ae2dc59786..2c99e941f5e 100644
--- a/llvm/test/CodeGen/X86/combine-srl.ll
+++ b/llvm/test/CodeGen/X86/combine-srl.ll
@@ -3,24 +3,6 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-SLOW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2-FAST
 
-; fold (srl undef, x) -> 0
-define i32 @combine_lshr_undef0(i32 %x) {
-; CHECK-LABEL: combine_lshr_undef0:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    retq
-  %1 = lshr i32 undef, %x
-  ret i32 %1
-}
-
-define <4 x i32> @combine_vec_lshr_undef0(<4 x i32> %x) {
-; CHECK-LABEL: combine_vec_lshr_undef0:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:    retq
-  %1 = lshr <4 x i32> undef, %x
-  ret <4 x i32> %1
-}
-
 ; fold (srl 0, x) -> 0
 define <4 x i32> @combine_vec_lshr_zero(<4 x i32> %x) {
 ; SSE-LABEL: combine_vec_lshr_zero: