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* [X86] Fix SLM v2i64 ADD/Sub/CMPEQ instruction schedulesSimon Pilgrim2019-11-062-14/+14
* [X86] Fix SLM v2f64 ADD/MUL + FP BLEND/HADD instruction schedulesSimon Pilgrim2019-11-063-43/+43
* [MCA][X86] Add tests for LOCK variants of standard X86 arithmetic opsSimon Pilgrim2019-08-201-1/+382
* [X86] Move scheduling tests for CMPXCHG to the corresponding resources-x86_64...Andrea Di Biagio2019-08-192-41/+14
* [X86] Added extensive scheduling model tests for all the CMPXCHG variants. NFCAndrea Di Biagio2019-08-191-1/+46
* [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsrClement Courbet2019-06-191-2/+2
* [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly prin...Craig Topper2019-05-062-8/+8
* [llvm-mca][x86] Fix MMX PMOVMSKB testSimon Pilgrim2019-04-291-3/+3
* [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of cust...Craig Topper2019-03-182-16/+16
* [llvm-mca][X86] Add ADC/SBB with zero test casesSimon Pilgrim2019-03-061-1/+73
* [X86] Print all register forms of x87 fadd/fsub/fdiv/fmul as having two argum...Craig Topper2019-02-041-44/+44
* [X86] Print %st(0) as %st when its implicit to the instruction. Continue prin...Craig Topper2019-02-041-42/+42
* Revert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses a...Craig Topper2019-02-041-54/+54
* [X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber na...Craig Topper2019-02-031-54/+54
* [llvm-mca][X86] Add missing enter/leave, invlpg/invlpga, rdmsr/wrmsr, rdpmc a...Simon Pilgrim2019-01-221-1/+33
* [llvm-mca][X86] Add missing mfence/pinsrw testsSimon Pilgrim2019-01-221-1/+12
* [llvm-mca][X86] Add missing monitor/mwait testsSimon Pilgrim2019-01-221-1/+9
* [llvm-mca][x86] Add RDSEED instruction resource tests for GLMSimon Pilgrim2018-12-071-0/+39
* [llvm-mca][x86] Add missing AES instruction resource testsSimon Pilgrim2018-12-071-0/+71
* [llvm-mca][x86] Add RDRAND/RDSEED instruction resource testsSimon Pilgrim2018-12-071-0/+39
* [X86] ALU/ADC RMW instructions should use the WriteRMW sequence classSimon Pilgrim2018-10-031-94/+94
* [X86] Fix scheduler class for BTmi instructionsSimon Pilgrim2018-09-301-7/+7
* [X86] MCA tests for XCHG*, XADD* and CMPXCHG* instructionsAndrew V. Tischenko2018-08-071-1/+94
* [llvm-mca][x86] Add CMPXCHG instruction resource testsSimon Pilgrim2018-08-011-0/+36
* [llvm-mca][x86] Add PREFETCHW instruction resource testsSimon Pilgrim2018-08-011-0/+36
* [llvm-mca][x86] Add PCLMUL instruction resource testsSimon Pilgrim2018-08-011-0/+36
* [llvm-mca][x86] Add SET/TEST instruction resource testsSimon Pilgrim2018-08-011-1/+180
* [llvm-mca][x86] Add LEA instruction resource testsSimon Pilgrim2018-08-011-0/+437
* [llvm-mca][x86] Add more x86-64 system instruction resource testsSimon Pilgrim2018-08-011-1/+92
* [llvm-mca][x86] Add CMPS/LODS/MOVS/STOS string instruction resource testsSimon Pilgrim2018-08-011-1/+53
* [llvm-mca][x86] Add STC + STD instruction resource testsSimon Pilgrim2018-08-011-1/+8
* [llvm-mca][x86] Add 32-bit instruction resource testsSimon Pilgrim2018-07-311-0/+78
* [llvm-mca][x86] Add movsx/movzx instructions to general x86_64 resource testsSimon Pilgrim2018-07-201-1/+70
* [llvm-mca][x86] Add extend, carry-flag and CMP instructions to general x86_64...Simon Pilgrim2018-07-171-1/+120
* [llvm-mca][x86] Add MOVBE resource tests to all supporting targetsSimon Pilgrim2018-07-171-0/+50
* [llvm-mca][x86] Add BSWAP resource testsSimon Pilgrim2018-07-171-1/+8
* [X86] Fix MayLoad/HasSideEffect flag for (V)MOVLPSrm instructions.Andrea Di Biagio2018-07-111-1/+1
* [llvm-mca] Use a different character to flag instructions with side-effects i...Andrea Di Biagio2018-07-1111-187/+187
* [MCA][X86][NFC] Add BSF/BSR resource testsRoman Lebedev2018-07-081-1/+40
* [X86] Add sched class WriteLAHFSAHF and fix values.Clement Courbet2018-06-201-1/+9
* [llvm-mca][x86] Fix all resources-x86_64.s tests to use different registers i...Simon Pilgrim2018-06-061-195/+195
* [CodeGen] assume max/default throughput for unspecified instructionsSanjay Patel2018-06-052-8/+8
* [llvm-mca] Make sure not to end the test files with an empty line.Roman Lebedev2018-06-0411-11/+0
* [X86] Introduce WriteFLDC for x87 constant loads.Clement Courbet2018-05-311-11/+11
* [X86] Extract latency of fldz/fld1 in separate classes.Clement Courbet2018-05-311-5/+5
* [X86][Sched] Add InstRW for CLC on Intel after SNB.Clement Courbet2018-05-291-1/+5
* [X86][SSE] Ensure vector partial load/stores use the WriteVecLoad/WriteVecSto...Simon Pilgrim2018-05-182-5/+5
* [X86][SSE] Ensure float load/stores use the WriteFLoad/WriteFStore scheduler ...Simon Pilgrim2018-05-182-8/+8
* [llvm-mca][X86] Add CMOV test filesSimon Pilgrim2018-05-171-0/+324
* [llvm-mca] Regenerate tests after r332381 and r332361. NFCAndrea Di Biagio2018-05-1610-2870/+2870
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