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* [X86][BtVer2] Improved latency and throughput of float/vector loads and stores.Andrea Di Biagio2019-10-141-3/+3
* [X86] Add missing properties on llvm.x86.sse.{st,ld}mxcsrClement Courbet2019-06-191-2/+2
* [X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly prin...Craig Topper2019-05-061-4/+4
* [llvm-mca][x86] Fix MMX PMOVMSKB testSimon Pilgrim2019-04-291-3/+3
* [X86] Remove the _alt forms of (V)CMP instructions. Use a combination of cust...Craig Topper2019-03-181-8/+8
* [X86][Btver2] Improved latency/throughput model for scalar int-to-float conve...Andrea Di Biagio2019-01-291-4/+4
* [X86][BtVer2] Update the WriteLoad latency.Andrea Di Biagio2019-01-211-5/+5
* [X86][Btver2] CVTSS2I/CVTSD2I - add missing JFPU0 pipeSimon Pilgrim2018-09-281-9/+9
* [X86] Fix MayLoad/HasSideEffect flag for (V)MOVLPSrm instructions.Andrea Di Biagio2018-07-111-1/+1
* [llvm-mca] Use a different character to flag instructions with side-effects i...Andrea Di Biagio2018-07-111-7/+7
* [llvm-mca] Make sure not to end the test files with an empty line.Roman Lebedev2018-06-041-1/+0
* [X86][BtVer2] Improve simulation of (V)PINSR valuesSimon Pilgrim2018-05-181-2/+2
* [X86][BtVer2] Partial vector stores (inc MMX) have a 2cy latencySimon Pilgrim2018-05-181-3/+3
* [X86][SSE] Ensure float load/stores use the WriteFLoad/WriteFStore scheduler ...Simon Pilgrim2018-05-181-5/+5
* [llvm-mca] Regenerate tests after r332381 and r332361. NFCAndrea Di Biagio2018-05-161-264/+264
* [X86][BtVer2] Fix MMX/YMM integer vector nt store schedulesSimon Pilgrim2018-05-141-1/+1
* [X86][MMX] Tag MMX Move/Load/Store as WriteVec schedule classesSimon Pilgrim2018-05-111-2/+2
* [llvm-mca][X86] Add prefetch instruction resource testsSimon Pilgrim2018-04-191-1/+14
* [llvm-mca][X86] Add mmx instruction to btver2 resource testsSimon Pilgrim2018-04-191-7/+110
* [UpdateTestChecks] Add update_mca_test_checks.py scriptGreg Bedwell2018-04-181-3/+6
* [X86][Btver2] Strip unnecessary check prefixes from resources testsSimon Pilgrim2018-04-041-1/+1
* [X86][Btver2] Add (U)COMISD/(U)COMISD scheduler costsSimon Pilgrim2018-03-261-4/+4
* [X86][Btver2] Add CVTSI2SD/CVTSI2SS scheduler costsSimon Pilgrim2018-03-261-4/+4
* [X86][Btver2] Account for the "+i" integer pipe transfer costs (1cy use of JA...Simon Pilgrim2018-03-261-1/+1
* [X86][Btver2] Add CVTSD2SI/CVTSS2SI scheduler costsSimon Pilgrim2018-03-261-16/+16
* [llvm-mca] Fix how views are added to the InstructionTables.Andrea Di Biagio2018-03-261-0/+103
* [llvm-mca] Add flag -instruction-tables to print the theoretical resource pre...Andrea Di Biagio2018-03-261-27/+28
* [X86][Btver2] Cleanup MOVMSK instructions to use JFPA function unitSimon Pilgrim2018-03-231-3/+3
* [X86][Btver2] Vector store instructions use a JFPU1 scheduler pipe and JSAGU/...Simon Pilgrim2018-03-231-2/+2
* [X86][Btver2] Vector move/load/store instructions use a JFPU01 scheduler pipe...Simon Pilgrim2018-03-231-9/+9
* [X86][Btver2] Conversion, MaskedLoad/MaskedStore and NTStores all are schedul...Simon Pilgrim2018-03-221-1/+1
* [X86][Btver2] FCMP (inc FMAX/FMIN) instructions use the JFPA functional pipeSimon Pilgrim2018-03-221-14/+14
* [X86][Btver2] Modelled float bitwise instructions as being performed on the f...Simon Pilgrim2018-03-181-14/+14
* [X86][Btver2] Correctly distinguish between scheduling pipe and functional un...Simon Pilgrim2018-03-181-58/+58
* [X86][Btver2] Add llvm-mca tests to show pipe resource usage of most vector i...Simon Pilgrim2018-03-181-0/+245
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