| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [llvm-mca] Use a different character to flag instructions with side-effects i... | Andrea Di Biagio | 2018-07-11 | 1 | -3/+3 |
| * | [llvm-mca] Make sure not to end the test files with an empty line. | Roman Lebedev | 2018-06-04 | 1 | -1/+0 |
| * | [X86] Add GPR<->XMM Schedule Tags | Simon Pilgrim | 2018-05-18 | 1 | -9/+9 |
| * | [X86][BtVer2] Partial vector stores (inc MMX) have a 2cy latency | Simon Pilgrim | 2018-05-18 | 1 | -2/+2 |
| * | [X86][SSE] Ensure vector partial load/stores use the WriteVecLoad/WriteVecSto... | Simon Pilgrim | 2018-05-18 | 1 | -3/+3 |
| * | [llvm-mca] Regenerate tests after r332381 and r332361. NFC | Andrea Di Biagio | 2018-05-16 | 1 | -226/+226 |
| * | [X86][MMX] Tag MMX Move/Load/Store as WriteVec schedule classes | Simon Pilgrim | 2018-05-11 | 1 | -3/+3 |
| * | [X86] Add WriteEMMS scheduler class | Simon Pilgrim | 2018-05-04 | 1 | -3/+3 |
| * | [llvm-mca][X86] Add mmx instruction to btver2 resource tests | Simon Pilgrim | 2018-04-19 | 1 | -0/+400 |
 |
index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
|