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* Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"...Fangrui Song2019-12-246-6/+6
* Migrate function attribute "no-frame-pointer-elim-non-leaf" to "frame-pointer...Fangrui Song2019-12-242-2/+2
* Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" a...Fangrui Song2019-12-2413-16/+16
* [LV] Strip wrap flags from vectorized reductionsAyal Zaks2019-12-208-21/+79
* [PowerPC] Add missing legalization for vector BSWAPNemanja Ivanovic2019-12-171-0/+97
* [ARM] Add missing REQUIRES: asserts to test. NFCDavid Green2019-12-091-0/+1
* [ARM] Enable MVE masked loads and storesDavid Green2019-12-094-6/+6
* [ARM] Teach the Arm cost model that a Shift can be folded into other instruct...David Green2019-12-091-2/+2
* [ARM] Additional tests and minor formatting. NFCDavid Green2019-12-091-0/+86
* [ARM] Disable VLD4 under MVEDavid Green2019-12-082-22/+109
* [LV] Pick correct BB as insert point when fixing PHI for FORs.Florian Hahn2019-12-071-0/+103
* [LV] Scalar with predication must not be uniformAyal Zaks2019-12-031-0/+83
* [InstCombine] Revert rL341831: relax one-use check in foldICmpAddConstant() (...Roman Lebedev2019-12-022-43/+43
* [IVDescriptors] Skip FOR where we have multiple sink points for now.Florian Hahn2019-11-281-0/+30
* [x86] make SLM extract vector element more expensive than defaultSanjay Patel2019-11-271-6/+6
* Recommit f0c2a5a "[LV] Generalize conditions for sinking instrs for first ord...Florian Hahn2019-11-242-0/+290
* [LV] PreferPredicateOverEpilog respecting optionSjoerd Meijer2019-11-211-0/+18
* [ARM] MVE interleaving load and stores.David Green2019-11-191-54/+54
* [ARM] Add and update a lot of VLDn tests. NFCDavid Green2019-11-191-0/+695
* [ARM][MVE] tail-predicationSjoerd Meijer2019-11-151-0/+26
* [LV] PreferPredicateOverEpilog respecting predicate loop hintSjoerd Meijer2019-11-141-9/+6
* [ARM][MVE] canTailPredicateLoopSjoerd Meijer2019-11-131-27/+592
* [LV] Apply sink-after & interleave-groups as VPlan transformations (NFCI)Gil Rapaport2019-11-092-0/+84
* Revert "[LV] Apply sink-after & interleave-groups as VPlan transformations (N...Gil Rapaport2019-11-081-35/+0
* [LV] Apply sink-after & interleave-groups as VPlan transformations (NFCI)Gil Rapaport2019-11-081-0/+35
* Revert f0c2a5a "[LV] Generalize conditions for sinking instrs for first order...Hans Wennborg2019-11-071-245/+0
* [TTI][LV] preferPredicateOverEpilogueSjoerd Meijer2019-11-062-2/+82
* [LV] Generalize conditions for sinking instrs for first order recurrences.Florian Hahn2019-11-021-0/+245
* [LV] Move interleave_short_tc.ll into the X86 directory to hopefully make fix...Craig Topper2019-11-011-0/+0
* [LV] Add test case that was supposed to go with D67948Craig Topper2019-10-311-0/+59
* [ConstantFold] Fold extractelement of getelementptrJay Foad2019-10-281-1/+1
* [LV] Interleaving should not exceed estimated loop trip count.Craig Topper2019-10-281-1/+1
* [DAGCombine][ARM] Enable extending masked loadsSam Parker2019-10-171-3/+139
* recommit: [LoopVectorize][PowerPC] Estimate int and float register pressure s...Zi Xuan Wu2019-10-123-10/+165
* [LV] Emitting SCEV checks with OptForSizeSjoerd Meijer2019-10-091-0/+37
* Revert "[LoopVectorize][PowerPC] Estimate int and float register pressure sep...Jinsong Ji2019-10-083-215/+10
* [NFC] Add REQUIRES for r374017 in testcaseZi Xuan Wu2019-10-081-0/+1
* [LoopVectorize][PowerPC] Estimate int and float register pressure separately ...Zi Xuan Wu2019-10-083-10/+214
* [LoopVectorize] add test that asserted after cost model change (PR43582); NFCSanjay Patel2019-10-071-0/+127
* [LV] Forced vectorization with runtime checks and OptForSizeSjoerd Meijer2019-09-241-1/+31
* [LV] Add ARM MVE tail-folding testsSjoerd Meijer2019-09-161-0/+89
* [ARM] Masked loads and storesDavid Green2019-09-151-0/+40
* Remove a duplicate testPhilip Reames2019-09-121-320/+14
* [LV] Update test case after r371768.Florian Hahn2019-09-121-15/+143
* Precommit tests for generalization of load dereferenceability in loopPhilip Reames2019-09-121-10/+717
* [LV] Support invariant addresses in speculation logicPhilip Reames2019-09-121-153/+57
* [Tests] Fix a typo in a testPhilip Reames2019-09-091-83/+96
* [Tests] Precommit test case for D67372Philip Reames2019-09-091-10/+302
* [LoopVectorize] Leverage speculation safety to avoid masked.loadsPhilip Reames2019-09-092-18/+18
* [X86] Replace -mcpu with -mattr on some tests.Craig Topper2019-09-061-1/+1
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