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* AMDGPU: Enable code object v3 for AMDHSA onlyKonstantin Zhuravlyov2018-11-151-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D54186 llvm-svn: 346923
* Revert r345542: AMDGPU: Enable code object v3 by defaultKonstantin Zhuravlyov2018-10-301-1/+1
| | | | | | It breaks mesa. llvm-svn: 345662
* AMDGPU: Enable code object v3 by defaultKonstantin Zhuravlyov2018-10-291-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D53525 llvm-svn: 345542
* [AMDGPU][MC][GFX8][GFX9] Corrected names of integer ↵Dmitry Preobrazhensky2017-11-201-4/+4
| | | | | | | | | | | | v_{add/addc/sub/subrev/subb/subbrev} See bug 34765: https://bugs.llvm.org//show_bug.cgi?id=34765 Reviewers: tamazov, SamWot, arsenm, vpykhtin Differential Revision: https://reviews.llvm.org/D40088 llvm-svn: 318675
* AMDGPU: Add ELFOSABI_AMDGPU_PALKonstantin Zhuravlyov2017-10-031-1/+1
| | | | llvm-svn: 314843
* [AMDGPU] llvm-objdump: Skip amd_kernel_code_t only at the begining of kernel ↵Sam Kolton2016-08-171-0/+8
| | | | | | | | | | | | | | symbol. Summary: This change fix bug in AMDGPU disassembly. Previously, presence of symbols other than kernel symbols caused objdump to skip begining of those symbols. Reviewers: tstellarAMD, vpykhtin, Bigcheese, ruiu Subscribers: kzhuravl, arsenm Differential Revision: http://reviews.llvm.org/D21966 llvm-svn: 278921
* AMDGPU/SI: Add support for AMD code object version 2.Tom Stellard2016-05-051-1/+1
| | | | | | | | | | | | | | Summary: Version 2 is now the default. If you want to emit version 1, use the amdgcn--amdhsa-amdcov1 triple. Reviewers: arsenm, kzhuravl Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19283 llvm-svn: 268647
* [AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.Valery Pykhtin2016-04-071-0/+75
| | | | | | | | | | | | Reenable reverted r265550 with endianness issue fixed. Variables of endian-aware types such as ulittle32_t should be explicitly casted to their natural equivalent types before passing it as vararg to printf like functions (format in my case). Added lit config file depending on AMDGPU target as the testcase uses assembler. Differential revision: http://reviews.llvm.org/D16998 llvm-svn: 265645
* Revert "[AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support."Valery Pykhtin2016-04-061-75/+0
| | | | | | This reverts commit r265550. There're problems with endianness on dumping instruction bytes. Need to find out how to use support::ulittle32_t type properly. llvm-svn: 265554
* [AMDGPU] llvm-objdump: Minimal HSA Code Object disassembler support.Valery Pykhtin2016-04-061-0/+75
Differential revision: http://reviews.llvm.org/D16998 llvm-svn: 265550
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