Commit message (Expand) | Author | Age | Files | Lines | |
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* | The patch adds missing registers and instructions to complete all the registe... | Chris Dewhurst | 2016-02-27 | 1 | -11/+19 |
* | Reverting breaking change. Sorry. | Chris Dewhurst | 2016-02-26 | 1 | -19/+11 |
* | Reviewed at reviews.llvm.org/D17133 | Chris Dewhurst | 2016-02-26 | 1 | -11/+19 |
* | Load/store instructions for floating points with address space require SparcV9. | Joerg Sonnenberger | 2015-08-18 | 1 | -22/+2 |
* | Load/store for float registers from/to alternate space. | Joerg Sonnenberger | 2015-08-10 | 1 | -0/+29 |
* | TableGen: fix operand counting for aliases | Tim Northover | 2014-05-16 | 1 | -6/+6 |
* | [Sparc] Add fcmpe* instructions to Sparc backend. | Venkatraman Govindaraju | 2014-03-02 | 1 | -0/+14 |
* | [Sparc] Add support for parsing fcmp with %fcc registers. | Venkatraman Govindaraju | 2014-03-02 | 1 | -3/+10 |
* | [Sparc] Correct quad register list in the asm parser. | Venkatraman Govindaraju | 2014-01-24 | 1 | -0/+6 |
* | [Sparc] Add support for parsing floating point instructions. | Venkatraman Govindaraju | 2014-01-12 | 1 | -0/+113 |