summaryrefslogtreecommitdiffstats
path: root/llvm/test/MC/RISCV
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Fix evaluating %pcrel_lo against global and weak symbolsJames Clarke2020-01-235-17/+81
* [RISCV] Check register class for AMO memory operandsJames Clarke2020-01-131-0/+22
* [RISCV] Fix evalutePCRelLo for symbols at the end of a fragmentJames Clarke2020-01-081-31/+90
* [RISCV] Don't crash on unsupported relocationsLuís Marques2019-12-191-0/+7
* [RISCV][NFC] Trivial cleanupLuís Marques2019-12-171-1/+1
* [RISCV] Move DebugLoc Copy into CompressInstEmitterSam Elliott2019-12-131-0/+20
* [RISCV] Improve assembler missing feature warningsSimon Cook2019-12-1014-122/+141
* [RISCV] Add assembly mnemonic spell checkingSimon Cook2019-11-181-0/+32
* [RISCV] Fix evaluation of %pcrel_loRoger Ferrer Ibanez2019-11-081-0/+52
* [RISCV] Add obsolete aliases of fscsr, frcsr (fssr, frsr)Edward Jones2019-10-031-0/+12
* [RISCV] Support llvm-objdump -M no-aliases and -M numericSam Elliott2019-09-1052-76/+76
* [RISCV] Add Option for Printing Architectural Register NamesSam Elliott2019-09-103-0/+497
* [RISCV] Add support for RVC HINT instructionsLuis Marques2019-08-214-8/+106
* [RISCV] Implement getExprForFDESymbol to ensure RISCV_32_PCREL is used for th...Alex Bradbury2019-08-201-7/+1
* [RISCV] Don't force absolute FK_Data_X fixups to relocsAlex Bradbury2019-08-192-3/+21
* [RISCV] Allow parsing of bare symbols with offsetsLewis Revill2019-08-161-62/+67
* [RISCV] Add Custom Parser for Atomic Memory OperandsSam Elliott2019-08-015-6/+588
* [RISCV] Attempt to make rv{32,64}i-aliases-invalid.s less flakySam Elliott2019-07-302-6/+6
* Mark test/MC/RISCV/rv{32,64}i-aliases-invalid.s unsupported also on WindowsHans Wennborg2019-07-292-2/+2
* [RISCV][NFC] Correct RUN in rvi-pseudos-invalid.sSam Elliott2019-07-231-1/+1
* Revert [RISCV] Re-enable rv32i-aliases-invalid.s testSam Elliott2019-07-231-0/+1
* [RISCV] Re-enable rv32i-aliases-invalid.s testSam Elliott2019-07-231-1/+0
* [RISCV] Disable tests failing on buildbots.Matt Morehouse2019-07-192-0/+2
* [DebugInfo] Some fields do not need relocations even relax is enabled.Hsiangkai Wang2019-07-191-6/+3
* Revert "[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame."Hsiangkai Wang2019-07-181-3/+6
* [DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.Hsiangkai Wang2019-07-181-6/+3
* [RISCV][NFC] Add tests that capture current encodings for DWARF EHAlex Bradbury2019-07-171-0/+31
* [RISCV] Match GNU tools canonical JALR and add aliasesAlex Bradbury2019-07-165-26/+38
* [RISCV] Avoid overflow when determining number of nops for code alignAlex Bradbury2019-07-161-0/+7
* [RISCV] Allow parsing dot '.' in assemblySam Elliott2019-07-123-0/+12
* [RISCV] Add pseudo instruction for calls with explicit registerLewis Revill2019-06-262-0/+15
* [RISCV] Allow parsing immediates that use tilde & exclaimLewis Revill2019-06-191-0/+30
* [RISCV] Fix failure to parse parenthesized immediatesLewis Revill2019-06-191-0/+24
* [lit] Delete empty lines at the end of lit.local.cfg NFCFangrui Song2019-06-171-1/+0
* [RISCV] Support assembling TLS LA pseudo instructionsLewis Revill2019-05-231-21/+80
* [llvm-readobj] Change -long-option to --long-option in tests. NFCFangrui Song2019-05-012-20/+20
* [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiersLewis Revill2019-04-232-6/+38
* [RISCV] Diagnose invalid second input register operand when using %tprel_addRoger Ferrer Ibanez2019-04-111-0/+1
* [RISCV] Support assembling TLS add and associated modifiersLewis Revill2019-04-046-23/+61
* [RISCV] Support assembling @plt symbol operandsAlex Bradbury2019-04-023-0/+15
* [RISCV] Don't evaluatePCRelLo if a relocation will be forced (e.g. due to lin...Alex Bradbury2019-04-012-6/+8
* [RISCV] Add basic RV32E definitions and MC layer supportAlex Bradbury2019-03-225-0/+255
* [RISCV][NFC] Add test case to MC/RISCV/linker-relaxation.s showing incorrect ...Alex Bradbury2019-03-221-12/+28
* [RISCV][NFC] Expand test/MC/RISCV/linker-relaxation.s testsAlex Bradbury2019-03-221-5/+62
* [RISCV][NFC] Remove old CHECK lines from linker-relaxation.s testAlex Bradbury2019-03-211-6/+0
* [RISCV] Fix RISCVAsmParser::ParseRegister and add testsAlex Bradbury2019-03-172-0/+144
* [RISCV][MC] Find matching pcrel_hi fixup in more cases.Eli Friedman2019-03-121-0/+51
* [RISCV] Allow fp as an alias of s0Alex Bradbury2019-03-111-0/+16
* [RISCV] Support -target-abi at the MC layer and for codegenAlex Bradbury2019-03-092-0/+121
* [RISCV] Allow access to FP CSRs without F extensionAna Pazos2019-03-084-30/+21
OpenPOWER on IntegriCloud