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| author | Simon Cook <simon.cook@embecosm.com> | 2019-11-18 10:58:00 +0000 |
|---|---|---|
| committer | Simon Cook <simon.cook@embecosm.com> | 2019-11-18 10:58:00 +0000 |
| commit | eedb9648229ff14bf8d5a526099f765ea23f3777 (patch) | |
| tree | 88c4bd75a1b7d79dc80772bf2bc305f49ac765db /llvm/test/MC/RISCV | |
| parent | c00e5cf29d49e51701b00382a3f41a4dfe1c0c0f (diff) | |
| download | bcm5719-llvm-eedb9648229ff14bf8d5a526099f765ea23f3777.tar.gz bcm5719-llvm-eedb9648229ff14bf8d5a526099f765ea23f3777.zip | |
[RISCV] Add assembly mnemonic spell checking
Summary:
This allows the assembler to suggest alternative assembly mnemonics when
an invalid one has been provided.
Reviewers: asb, lenary, lewis-revill
Reviewed By: asb
Subscribers: hiraditya, rbar, johnrusso, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69894
Diffstat (limited to 'llvm/test/MC/RISCV')
| -rw-r--r-- | llvm/test/MC/RISCV/invalid-instruction-spellcheck.s | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/MC/RISCV/invalid-instruction-spellcheck.s b/llvm/test/MC/RISCV/invalid-instruction-spellcheck.s new file mode 100644 index 00000000000..c5c0d2f3a0b --- /dev/null +++ b/llvm/test/MC/RISCV/invalid-instruction-spellcheck.s @@ -0,0 +1,32 @@ +# RUN: not llvm-mc -triple=riscv32 < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK,CHECK-RV32,CHECK-RV32I %s +# RUN: not llvm-mc -triple=riscv64 < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK,CHECK-RV64,CHECK-RV64I %s +# RUN: not llvm-mc -triple=riscv32 -mattr=+f < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK,CHECK-RV32,CHECK-RV32IF %s +# RUN: not llvm-mc -triple=riscv64 -mattr=+f < %s 2>&1 \ +# RUN: | FileCheck -check-prefixes=CHECK,CHECK-RV64,CHECK-RV64IF %s + +# Tests for the mnemonic spell checker. Suggestions should only include those +# which are valid for the current set of features + +ad x1, x1, x1 +# CHECK-RV32: did you mean: add, addi, and, andi, la +# CHECK-RV64: did you mean: add, addi, addw, and, andi, la, ld, sd +# CHECK-NEXT: ad x1, x1, x1 + +fl ft0, 0(sp) +# CHECK-RV32I: did you mean: la, lb, lh, li, lw +# CHECK-RV32IF: did you mean: flw, la, lb, lh, li, lw +# CHECK-RV64I: did you mean: la, lb, ld, lh, li, lw +# CHECK-RV64IF: did you mean: flw, la, lb, ld, lh, li, lw +# CHECK-NEXT: fl ft0, 0(sp) + +addd x1, x1, x1 +# CHECK-RV32: did you mean: add, addi +# CHECK-RV64: did you mean: add, addi, addw +# CHECK-NEXT: addd x1, x1, x1 + +vm x0, x0 +# CHECK: did you mean: mv +# CHECK-NEXT: vm x0, x0 |
