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* [mips][microMIPS][DSP] Implement PACKRL.PH, PICK.PH, PICK.QB, SHILO, SHILOV ↵Zlatko Buljan2015-12-181-0/+4
| | | | | | | | and WRDSP instructions Differential Revision: http://reviews.llvm.org/D14429 llvm-svn: 255991
* [mips][DSP] Add DSPr1 and DSPr2 tests for the standard encodingsZlatko Buljan2015-12-031-45/+172
| | | | | | Differential Revision: http://reviews.llvm.org/D15141 llvm-svn: 254598
* [mips][ias] Range check uimm5 operands and fix several bugs this revealed.Daniel Sanders2015-11-262-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The bugs were: * append, prepend, and balign were not tested * balign takes a uimm2 not a uimm5. * drotr32 was correctly implemented with a uimm5 but the tests expected '52' to be valid. * li/la were implemented with a uimm5 instead of simm32. simm32 isn't completely correct either but I'll fix that when I get to simm32. A notable omission are some of the shift instructions. Several of these have been implemented using a single uimm6 instruction (rather than two uimm5 instructions and a CodeGen-only uimm6 pseudo). These will be updated in the uimm6 patch. Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14712 llvm-svn: 254164
* [mips][microMIPS] Implement SHRA[_R].PH, SHRAV[_R].PH, SHRAV[_R].QB, ↵Zlatko Buljan2015-11-131-0/+9
| | | | | | | | SHRAV_R.W, SHRA_R.W, SHRL.PH, SHRL.QB, SHRLV.PH and SHRLV.QB instructions Differential Revision: http://reviews.llvm.org/D14010 llvm-svn: 253041
* [mips] Move MC tests for the DSP ASE into the standard format.Daniel Sanders2015-11-111-0/+45
Summary: Only DSPr2 is present because it appears we've never added DSPr1 tests. We'll have to correct that in a later patch. Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14448 llvm-svn: 252752
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