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* [ARC] Prevent InstPrinter from crashing on unknown condition codes.Tatyana Krasnukha2018-09-061-0/+2
* [WebAssembly] Made disassembler only use stack instructions.Wouter van Oortmerssen2018-08-301-2/+2
* [mips] Add missing instructionsAleksandar Beserminji2018-08-296-0/+42
* [WebAssembly] Added default stack-only instruction mode for MC.Wouter van Oortmerssen2018-08-271-2/+1
* [WebAssembly] v128.constThomas Lively2018-08-211-0/+4
* [ARM/AArch64] Support FP16 +fp16fml instructionsBernard Ogden2018-08-174-0/+328
* Revert "[WebAssembly] Added default stack-only instruction mode for MC."Wouter van Oortmerssen2018-08-131-1/+2
* [X86] Don't ignore 0x66 prefix on relative jumps in 64-bit mode. Fix opcode s...Craig Topper2018-08-131-36/+48
* [WebAssembly] Added default stack-only instruction mode for MC.Wouter van Oortmerssen2018-08-101-2/+1
* Revert "[WebAssembly] Added default stack-only instruction mode for MC."Wouter van Oortmerssen2018-07-271-1/+2
* [WebAssembly] Added default stack-only instruction mode for MC.Wouter van Oortmerssen2018-07-271-2/+1
* [AArch64] Armv8.2-A: add the crypto extensionsSjoerd Meijer2018-07-261-0/+93
* Complete the SPE instruction set patternsJustin Hibbits2018-07-181-2/+513
* Follow up of r336913: forgot to add the new test files.Sjoerd Meijer2018-07-121-0/+277
* [AArch64] Armv8.4-A: TLB supportSjoerd Meijer2018-07-061-0/+151
* Recommit: [AArch64] Armv8.4-A: Flag manipulation instructionsSjoerd Meijer2018-07-061-0/+11
* Revert [AArch64] Armv8.4-A: Flag manipulation instructionsSjoerd Meijer2018-07-061-11/+0
* [AArch64] Armv8.4-A: Flag manipulation instructionsSjoerd Meijer2018-07-061-0/+11
* [AArch64][ARM] Armv8.4-A: Trace synchronization barrier instructionSjoerd Meijer2018-07-063-0/+23
* [X86][Disassembler] Fix LOCK prefix disassembler supportMaksim Panchenko2018-07-051-0/+4
* NFC - Various typo fixes in testsGabor Buella2018-07-041-1/+1
* [AArch64] Armv8.4-A: system registersSjoerd Meijer2018-07-036-0/+451
* [AArch64] Armv8.4-A: Virtualization system registersSjoerd Meijer2018-06-291-0/+39
* [X86] Teach the disassembler to use %eiz/%riz instead of NoRegister when the ...Craig Topper2018-06-272-8/+38
* ARM: correctly decode VFP instructions following unpredictable t2ITTim Northover2018-06-261-6/+6
* [PowerPC] Fix incorrectly encoded wait instructionLei Huang2018-06-251-4/+4
* [X86] Teach disassembler to use %eip instead of %rip when 0x67 prefix is used...Craig Topper2018-06-231-0/+4
* [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.Wouter van Oortmerssen2018-06-181-6/+6
* [X86] Properly disassemble gather/scatter instructions where xmm4/ymm4/zmm4 a...Craig Topper2018-06-061-0/+3
* [X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encod...Craig Topper2018-06-011-0/+4
* [X86][Disassembler] Ignore EVEX.X extension of modrm.rm to 5-bits when modrm....Craig Topper2018-06-011-0/+5
* [X86][Disassembler] Clamp index to 4-bits when decoding GPR registers.Craig Topper2018-06-011-1/+1
* [X86] Add a test case showing a bad disassembling of an EVEX instruction with...Craig Topper2018-06-011-0/+3
* [X86][Disassembler] Make sure EVEX.X is not used to extend base registers of ...Craig Topper2018-06-011-0/+4
* [X86] Make sure the check for VEX.vvvv being all ones on instructions that do...Craig Topper2018-06-011-0/+4
* [X86][Disassembler] Suppress reading of EVEX.V' and EVEX.R' in 32-bit mode.Craig Topper2018-06-011-2/+2
* [X86] Add test cases showing the disassembler producing an xmm16-xmm31 regist...Craig Topper2018-06-011-0/+6
* [mips] Correct the predicates of arithmetic and logic instructions.Simon Dardis2018-05-303-4/+9
* [mips] Correct the predicates for a number of instructions.Simon Dardis2018-05-292-4/+4
* [mips] Add microMIPSR6 ll/sc instructions.Simon Dardis2018-05-201-0/+4
* [mips] Add support for Global INValidate ASEPetar Jovanovic2018-05-174-0/+20
* AMDGPU: Fix v_dot{4, 8}* instruction encodingKonstantin Zhuravlyov2018-05-151-8/+308
* AMDGPU: Add disasm tests for deep learning instructions + fix v_fmac_f32 disasmKonstantin Zhuravlyov2018-05-151-0/+973
* [mips] Add disassembly support for comparison instructionsSimon Dardis2018-05-151-0/+32
* [mips] Fix predicates of mfc1, mtc1 instructionsSimon Dardis2018-05-154-0/+16
* [mips] Fix the predicates of round, ceiling, floor and trunc.Simon Dardis2018-05-142-0/+20
* [mips] Correct the predicates of indexed floating point stores and loads.Simon Dardis2018-05-142-0/+4
* [mips] Enable disassembly of fused (negative) multiply add/sub instructionsSimon Dardis2018-05-112-0/+16
* [WebAssembly] Initial Disassembler.Sam Clegg2018-05-102-0/+36
* [mips] Correct the predicates of cvt.fmt.fmt instructionsSimon Dardis2018-05-102-0/+4
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