bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	This change adds co-processor condition branching and conditional traps to th...	Chris Dewhurst	2016-03-09	1	-2/+104
*	Sparc: Support PSR, TBR, WIM read/write instructions.	James Y Knight	2015-05-18	1	-15/+0
*	Add support for the Sparc implementation-defined "ASR" registers.	James Y Knight	2015-05-18	1	-0/+15
*	[Sparc] Add return/rett instruction to Sparc backend.	Venkatraman Govindaraju	2014-03-02	1	-0/+3
*	[Sparc] Add support for decoding jmpl/retl/ret instruction.	Venkatraman Govindaraju	2014-03-02	1	-0/+9
*	[Sparc] Add support to decode unimp instruction.	Venkatraman Govindaraju	2014-03-01	1	-0/+2
*	[Sparc] Add support to decode negative simm13 operands in the sparc disassemb...	Venkatraman Govindaraju	2014-03-01	1	-0/+13
*	[Sparc] Add support for decoding call instructions in the sparc disassembler.	Venkatraman Govindaraju	2014-03-01	1	-0/+3
*	[Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the ...	Venkatraman Govindaraju	2014-03-01	1	-0/+3
*	[Sparc] Add support for parsing branch instructions and conditional moves.	Venkatraman Govindaraju	2014-01-08	1	-0/+87
*	[Sparc] Add initial implementation of disassembler for sparc	Venkatraman Govindaraju	2014-01-06	1	-0/+82