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path: root/llvm/test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt
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* [mips] Correct the predicates for special nops, tlb ctrl instrs, software bre...Simon Dardis2018-04-121-0/+1
* [mips] Place certain 64 bit FPU instructions in their own decoder namespaceSimon Dardis2017-10-051-0/+1
* Recommit: "[mips] Add rsqrt, recip for MIPS"Simon Dardis2016-10-051-0/+4
* Revert "[mips] Add rsqrt, recip for MIPS"Simon Dardis2016-10-051-4/+0
* [mips] Add rsqrt, recip for MIPSSimon Dardis2016-09-271-0/+4
* [mips] Range check uimm16 and fix several bugs this revealed.Daniel Sanders2016-02-011-5/+5
* [mips] Add missing MIPS32 - MIPS32R5 disassembler tests.Daniel Sanders2015-09-111-0/+197
* [mips] Added support for the ERETNC instruction.Vasileios Kalintiris2015-07-201-0/+1
* [mips] Sort big-endian disassembler tests by opcode.Daniel Sanders2015-06-271-142/+142
* [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.Daniel Sanders2015-06-271-0/+2
* [mips] Add backend support for Mips32r[35] and Mips64r[35].Daniel Sanders2015-02-181-0/+169
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