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path: root/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
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* [AArch64][v8.5A] Add speculation barriers SSBB and PSSBBOliver Stannard2018-09-271-2/+0
* [AArch64] CCSIDR2 system registerSam Parker2017-12-201-0/+3
* [AArch64] armv8-A doesn't have CRC.Ahmed Bougacha2017-05-031-17/+0
* AArch64: TableGenerate system instruction operands.Tim Northover2016-07-051-15/+15
* AArch64: allow MOV (imm) alias to be printedTim Northover2016-06-161-6/+6
* [AArch64] Add ARMv8.2-A FP16 scalar instructionsOliver Stannard2015-11-271-0/+112
* [AArch64] Fix problems in decoding generic MSR instructionsPetr Pavlu2015-07-151-0/+4
* ARM]: Add support for MMFR4_EL1 in assemblerJaved Absar2015-06-081-0/+2
* AArch64: add BFC alias for the BFI/BFM instructions.Tim Northover2015-04-301-2/+2
* Condition codes AL and NV are invalid in the aliases that useArtyom Skrobov2014-06-101-2/+20
* Restore getInvertedCondCode() from the phased-out backend, fixing disassembly...Artyom Skrobov2014-05-291-2/+4
* TableGen: use PrintMethods to print more aliasesTim Northover2014-05-121-28/+28
* AArch64/ARM64: port basic disassembly tests to ARM64.Tim Northover2014-05-011-652/+653
* [AArch64] Make the use of FP instructions optional, but enabled by default.Amara Emerson2013-10-311-1/+1
* Add AArch64 CRC32 instructionsTim Northover2013-02-061-0/+17
* Add icache prefetch operations to AArch64Tim Northover2013-02-061-0/+38
* Add AArch64 as an experimental target.Tim Northover2013-01-311-0/+4145
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