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* [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or belowPablo Barrio2020-01-131-16/+29
* [NFC] Fix trivial typos in commentsJames Henderson2020-01-061-2/+2
* Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"...Fangrui Song2019-12-241-1/+1
* [AArch64][v8.3a] Don't emit LDRA '[xN]!' alias in disassembly.Simon Tatham2019-11-281-2/+2
* AArch64: support the Apple NEON syntax for v8.2 crypto instructions.Tim Northover2019-11-271-0/+41
* [llvm-objdump] Print relocation addends in hexadecimalDavid Bozier2019-11-193-35/+35
* [AArch64][v8.3a] Add LDRA '[xN]!' alias.Ahmed Bougacha2019-11-131-0/+8
* [AArch64] Adding support for PMMIR_EL1 registerVictor Campos2019-10-181-0/+19
* [AArch64,Assembler] Compiler support for ID_MMFR5_EL1Mark Murray2019-10-162-0/+6
* [AArch64InstPrinter] prefer bfi to bfc for < armv8.2-aNick Desaulniers2019-10-032-6/+17
* AArch64: support arm64_32, an ILP32 slice for watchOS.Tim Northover2019-09-121-0/+15
* [AArch64] Update MTE system register encodingsLuke Cheeseman2019-08-211-10/+10
* [MC] Delete unnecessary diagnostic: "No relocation available to represent thi...Fangrui Song2019-08-192-3/+3
* [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-312-0/+71
* [AArch64][SVE2] Rename bitperm feature to sve2-bitpermCullen Rhodes2019-07-2612-39/+39
* [AArch64] Define ETE and TRBE system registersMomchil Velikov2019-07-263-0/+77
* [AArch64][SVE] Allow explicit size specifier for predicate operandMomchil Velikov2019-07-256-29/+137
* [ARM][AArch64] Support for Cortex-A65 & A65AE, Neoverse E1 & N1Pablo Barrio2019-07-254-3/+25
* MC: AArch64: Add support for prel_g* relocation specifiers.Peter Collingbourne2019-07-181-5/+33
* AArch64: Unify relocation restrictions between MOVK/MOVN/MOVZ.Peter Collingbourne2019-07-181-54/+0
* Revert [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-172-71/+0
* [AArch64] Add support for Transactional Memory Extension (TME)Momchil Velikov2019-07-172-0/+71
* MC: AArch64: Add support for pg_hi21_nc relocation specifier.Peter Collingbourne2019-07-101-0/+7
* [AArch64][AsmParser] error on unexpected SVE predicate type suffixCullen Rhodes2019-06-0756-33/+678
* [AArch64][AsmParser] Provide better diagnostics for SVE predicatesCullen Rhodes2019-06-07249-340/+340
* [AArch64][SVE2] Add CPU and arch directive testsCullen Rhodes2019-06-036-0/+156
* [AArch64][SVE2] Asm: support WHILE instructionsCullen Rhodes2019-05-3112-0/+502
* [AArch64][SVE2] Asm: support TBL/TBX instructionsCullen Rhodes2019-05-314-0/+137
* [AArch64][SVE2] Asm: support SVE2 store instructionsCullen Rhodes2019-05-319-2/+614
* [AArch64][SVE2] Asm: support SVE2 vector splice (constructive)Cullen Rhodes2019-05-302-0/+115
* [AArch64][SVE2] Asm: support SVE2 load instructionsCullen Rhodes2019-05-3015-2/+1127
* [AArch64][SVE2] Asm: support FCVTX/FLOGB instructionsCullen Rhodes2019-05-304-0/+175
* [AArch64][SVE2] Asm: add ext (immediate offset, constructive) instructionCullen Rhodes2019-05-302-0/+104
* [AArch64][SVE2] Asm: support SVE Bitwise Logical - Unpredicated GroupCullen Rhodes2019-05-2914-0/+590
* [AArch64][SVE2] Asm: support Floating Point Widening Multiply-AddCullen Rhodes2019-05-299-0/+510
* [AArch64][SVE2] Asm: support SVE2 Floating Point Pairwise GroupCullen Rhodes2019-05-2910-0/+515
* [AArch64][SVE2] Asm: support SVE2 Floating Point Convert GroupCullen Rhodes2019-05-286-0/+275
* [AArch64][SVE2] Asm: support SVE2 Crypto Extensions GroupCullen Rhodes2019-05-2814-0/+414
* [AArch64][SVE2] Asm: support SVE2 Histogram Computation GroupsCullen Rhodes2019-05-284-0/+121
* [AArch64][SVE2] Asm: support SVE2 Misc GroupCullen Rhodes2019-05-2824-0/+971
* [AArch64][SVE2] Asm: support SVE2 String Processing GroupCullen Rhodes2019-05-244-0/+186
* [AArch64][SVE2] Asm: support SVE2 Narrowing GroupCullen Rhodes2019-05-2460-0/+2682
* [AArch64][SVE2] Asm: support SVE2 Accumulate GroupCullen Rhodes2019-05-2436-0/+1667
* [AArch64][SVE2] Asm: add PMULLB/PMULLT instructionsCullen Rhodes2019-05-248-0/+212
* [AArch64][SVE2] Asm: add integer add/sub long/wide instructionsCullen Rhodes2019-05-2440-0/+1340
* [AArch64][SVE2] Asm: add various bitwise shift instructionsCullen Rhodes2019-05-2430-0/+1903
* [AArch64][SVE2] Asm: add saturating add/sub instructionsCullen Rhodes2019-05-2416-0/+768
* [AArch64][SVE2] Asm: add integer unary instructions (predicated)Cullen Rhodes2019-05-218-0/+316
* [AArch64][SVE2] Asm: add integer pairwise arithmetic instructionsCullen Rhodes2019-05-2110-0/+480
* [AArch64][SVE2] Asm: add SADALP and UADALP instructionsCullen Rhodes2019-05-204-0/+190
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