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path: root/llvm/test/CodeGen/X86/divrem8_ext.ll
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* [X86] Use MOVSX by default instead of CBW to extend i8 to AX for i8 sdivrem.Craig Topper2019-09-061-20/+8
* [X86] Use MOVZX16rr8/MOVZXrm8 when extending input for i8 udivrem.Craig Topper2019-09-061-10/+0
* Fixes removal of dead elements from PressureDiff (PR37252).Yury Gribov2018-09-261-1/+1
* [X86] Handle COPYs of physregs better (regalloc hints)Simon Pilgrim2018-09-191-0/+4
* Revert r342457 "Fixes removal of dead elements from PressureDiff (PR37252)."Hans Wennborg2018-09-181-1/+1
* Fixes removal of dead elements from PressureDiff (PR37252).Yury Gribov2018-09-181-1/+1
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-18/+18
* [X86] Remove 'NOREX' comment from the printing of _NOREX instructions.Craig Topper2018-01-231-18/+18
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-18/+18
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-18/+18
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-18/+18
* [X86] Improve handling of UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG to support 64...Craig Topper2017-10-261-3/+1
* Revert r314249 "Recommit r314151 "[X86] Make all the NOREX CodeGenOnly instru...Craig Topper2017-09-271-18/+18
* Recommit r314151 "[X86] Make all the NOREX CodeGenOnly instructions into post...Craig Topper2017-09-261-18/+18
* Revert "[X86] Make all the NOREX CodeGenOnly instructions into postRA pseudos...Benjamin Kramer2017-09-261-18/+18
* [X86] Make all the NOREX CodeGenOnly instructions into postRA pseudos like th...Craig Topper2017-09-251-18/+18
* [DAGCombiner] Make DAGCombiner smarter about overflowAmaury Sechet2017-02-061-2/+1
* [X86] Regenerated integer divide tests to test on 32 and 64 bit targetsSimon Pilgrim2016-11-161-60/+172
* Revert to extend i8/i16 return values on Darwin (PR26665)Hans Wennborg2016-02-181-4/+4
* [X86] Don't zero/sign-extend i1, i8, or i16 return values to 32 bits (PR22532)Hans Wennborg2016-02-081-4/+4
* PR25754: avoid generating UDIVREM8_ZEXT_HREG nodes with i64 resultArtyom Skrobov2016-01-061-0/+19
* [X86] 8bit divrem: Improve codegen for AH register extraction.Ahmed Bougacha2014-11-031-0/+100
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