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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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llvm
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test
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CodeGen
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X86
/
bt.ll
Commit message (
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Author
Age
Files
Lines
*
Fix non-deterministic SDNodeOrder-dependent codegen
Nico Rieck
2014-01-12
1
-1
/
+1
*
Enable MI Sched for x86.
Andrew Trick
2013-10-15
1
-27
/
+27
*
Revert "Temporarily enable MI-Sched on X86."
Andrew Trick
2013-06-25
1
-27
/
+27
*
Temporarily enable MI-Sched on X86.
Andrew Trick
2013-06-24
1
-27
/
+27
*
Remove a recently redundant transform from X86ISelLowering.
David Majnemer
2013-05-05
1
-4
/
+1
*
Add x86 isel lowering logic to form bit test with inverted condition. e.g.
Evan Cheng
2012-12-05
1
-3
/
+97
*
Eliminate more uses of llvm-as and llvm-dis.
Dan Gohman
2009-09-08
1
-3
/
+3
*
Add explicit -march=x86 to these tests so that they don't
Dan Gohman
2009-02-03
1
-2
/
+2
*
Make x86's BT instruction matching more thorough, and add some
Dan Gohman
2009-01-29
1
-3
/
+417
*
Disable the register+memory forms of the bt instructions for now. Thanks
Dan Gohman
2009-01-13
1
-1
/
+6
*
Do not isel load folding bt instructions for pentium m, core, core2, and AMD ...
Evan Cheng
2009-01-02
1
-0
/
+2
*
add PR #
Chris Lattner
2008-12-25
1
-0
/
+1
*
Add a simple pattern for matching 'bt'.
Chris Lattner
2008-12-25
1
-0
/
+20