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bcm5719-llvm
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Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
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test
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CodeGen
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X86
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bt.ll
Commit message (
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)
Author
Age
Files
Lines
*
[x86] make 8-bit shl undesirable
Sanjay Patel
2019-04-08
1
-8
/
+7
*
[SelectionDAG] Teach GetDemandedBits to look at the known zeros of the LHS wh...
Craig Topper
2019-02-20
1
-2
/
+0
*
[X86] Add test case to show missed opportunity to remove an explicit AND on t...
Craig Topper
2019-02-20
1
-0
/
+31
*
Revert r354498 "[X86] Add test case to show missed opportunity to remove an e...
Craig Topper
2019-02-20
1
-29
/
+0
*
[X86] Add test case to show missed opportunity to remove an explicit AND on t...
Craig Topper
2019-02-20
1
-0
/
+29
*
[DAG] consolidate shift simplifications
Sanjay Patel
2018-11-23
1
-1
/
+1
*
[X86] Handle COPYs of physregs better (regalloc hints)
Simon Pilgrim
2018-09-19
1
-6
/
+6
*
[CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih
2017-12-04
1
-120
/
+120
*
[SelectionDAG][X86] CombineBT - more aggressively determine demanded bits
Simon Pilgrim
2017-07-29
1
-5
/
+1
*
[X86] Add combineBT test failure because bits have multiple uses.
Simon Pilgrim
2017-07-26
1
-0
/
+64
*
[X86] Regenerated BT tests
Simon Pilgrim
2017-07-26
1
-297
/
+628
*
[x86] regenerate checks with update_llc_test_checks.py
Sanjay Patel
2017-06-12
1
-32
/
+177
*
CodeGen: Allow small copyable blocks to "break" the CFG.
Kyle Butt
2017-01-31
1
-4
/
+4
*
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
Kyle Butt
2017-01-11
1
-6
/
+4
*
CodeGen: Allow small copyable blocks to "break" the CFG.
Kyle Butt
2017-01-10
1
-4
/
+6
*
X86: Improve BT instruction selection for 64-bit values.
Peter Collingbourne
2016-10-21
1
-0
/
+12
*
AVX-512: Fixed BT instruction selection.
Elena Demikhovsky
2016-07-19
1
-452
/
+80
*
X86: Updated a test file. NFC.
Elena Demikhovsky
2016-07-17
1
-79
/
+452
*
auto-generate checks
Sanjay Patel
2016-07-14
1
-394
/
+458
*
Fix non-deterministic SDNodeOrder-dependent codegen
Nico Rieck
2014-01-12
1
-1
/
+1
*
Enable MI Sched for x86.
Andrew Trick
2013-10-15
1
-27
/
+27
*
Revert "Temporarily enable MI-Sched on X86."
Andrew Trick
2013-06-25
1
-27
/
+27
*
Temporarily enable MI-Sched on X86.
Andrew Trick
2013-06-24
1
-27
/
+27
*
Remove a recently redundant transform from X86ISelLowering.
David Majnemer
2013-05-05
1
-4
/
+1
*
Add x86 isel lowering logic to form bit test with inverted condition. e.g.
Evan Cheng
2012-12-05
1
-3
/
+97
*
Eliminate more uses of llvm-as and llvm-dis.
Dan Gohman
2009-09-08
1
-3
/
+3
*
Add explicit -march=x86 to these tests so that they don't
Dan Gohman
2009-02-03
1
-2
/
+2
*
Make x86's BT instruction matching more thorough, and add some
Dan Gohman
2009-01-29
1
-3
/
+417
*
Disable the register+memory forms of the bt instructions for now. Thanks
Dan Gohman
2009-01-13
1
-1
/
+6
*
Do not isel load folding bt instructions for pentium m, core, core2, and AMD ...
Evan Cheng
2009-01-02
1
-0
/
+2
*
add PR #
Chris Lattner
2008-12-25
1
-0
/
+1
*
Add a simple pattern for matching 'bt'.
Chris Lattner
2008-12-25
1
-0
/
+20