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path: root/llvm/test/CodeGen/X86/bt.ll
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* [x86] make 8-bit shl undesirableSanjay Patel2019-04-081-8/+7
* [SelectionDAG] Teach GetDemandedBits to look at the known zeros of the LHS wh...Craig Topper2019-02-201-2/+0
* [X86] Add test case to show missed opportunity to remove an explicit AND on t...Craig Topper2019-02-201-0/+31
* Revert r354498 "[X86] Add test case to show missed opportunity to remove an e...Craig Topper2019-02-201-29/+0
* [X86] Add test case to show missed opportunity to remove an explicit AND on t...Craig Topper2019-02-201-0/+29
* [DAG] consolidate shift simplificationsSanjay Patel2018-11-231-1/+1
* [X86] Handle COPYs of physregs better (regalloc hints)Simon Pilgrim2018-09-191-6/+6
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-120/+120
* [SelectionDAG][X86] CombineBT - more aggressively determine demanded bitsSimon Pilgrim2017-07-291-5/+1
* [X86] Add combineBT test failure because bits have multiple uses.Simon Pilgrim2017-07-261-0/+64
* [X86] Regenerated BT testsSimon Pilgrim2017-07-261-297/+628
* [x86] regenerate checks with update_llc_test_checks.pySanjay Patel2017-06-121-32/+177
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-311-4/+4
* Revert "CodeGen: Allow small copyable blocks to "break" the CFG."Kyle Butt2017-01-111-6/+4
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-101-4/+6
* X86: Improve BT instruction selection for 64-bit values.Peter Collingbourne2016-10-211-0/+12
* AVX-512: Fixed BT instruction selection.Elena Demikhovsky2016-07-191-452/+80
* X86: Updated a test file. NFC.Elena Demikhovsky2016-07-171-79/+452
* auto-generate checksSanjay Patel2016-07-141-394/+458
* Fix non-deterministic SDNodeOrder-dependent codegenNico Rieck2014-01-121-1/+1
* Enable MI Sched for x86.Andrew Trick2013-10-151-27/+27
* Revert "Temporarily enable MI-Sched on X86."Andrew Trick2013-06-251-27/+27
* Temporarily enable MI-Sched on X86.Andrew Trick2013-06-241-27/+27
* Remove a recently redundant transform from X86ISelLowering.David Majnemer2013-05-051-4/+1
* Add x86 isel lowering logic to form bit test with inverted condition. e.g.Evan Cheng2012-12-051-3/+97
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-081-3/+3
* Add explicit -march=x86 to these tests so that they don'tDan Gohman2009-02-031-2/+2
* Make x86's BT instruction matching more thorough, and add someDan Gohman2009-01-291-3/+417
* Disable the register+memory forms of the bt instructions for now. ThanksDan Gohman2009-01-131-1/+6
* Do not isel load folding bt instructions for pentium m, core, core2, and AMD ...Evan Cheng2009-01-021-0/+2
* add PR #Chris Lattner2008-12-251-0/+1
* Add a simple pattern for matching 'bt'.Chris Lattner2008-12-251-0/+20
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