bcm5719-llvm - Project Ortega BCM5719 LLVM

	Commit message (Expand)	Author	Age	Files	Lines
*	[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(conc...	Simon Pilgrim	2019-07-04	1	-2/+1
*	[X86][SSE] Fold scalar_to_vector(i64 anyext(x)) -> bitcast(scalar_to_vector(i...	Simon Pilgrim	2019-03-15	1	-6/+3
*	[X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute v16i16/v32i8 unar...	Simon Pilgrim	2018-10-21	1	-6/+2
*	[X86] Add 128 MOVDDUP to the constant pool printing in X86AsmPrinter::EmitIns...	Craig Topper	2018-10-15	1	-1/+2
*	[X86] Handle COPYs of physregs better (regalloc hints)	Simon Pilgrim	2018-09-19	1	-3/+3
*	Followup on Proposal to move MIR physical register namespace to '$' sigil.	Puyan Lotfi	2018-01-31	1	-3/+3
*	[X86] Prevent combining (v8i1 (bitconvert (i8 load)))->(v8i1 load) if we don'...	Craig Topper	2017-12-31	1	-6/+2
*	[X86][SSE] Match PSHUFLW/PSHUFHW + PSHUFD vXi16 shuffle patterns (PR34686)	Simon Pilgrim	2017-12-29	1	-4/+4
*	[X86] When lowering extending loads from v2i1/v4i1, if we have VLX, use a nar...	Craig Topper	2017-12-28	1	-7/+4
*	[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.	Francis Visoiu Mistrih	2017-12-07	1	-5/+5
*	[CodeGen] Unify MBB reference format in both MIR and debug output	Francis Visoiu Mistrih	2017-12-04	1	-24/+24
*	[CodeGen] Print register names in lowercase in both MIR and debug output	Francis Visoiu Mistrih	2017-11-28	1	-5/+5
*	[X86][SSE] Add support for extending bool vectors bitcasted from scalars	Simon Pilgrim	2017-09-24	1	-557/+149
*	[X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectors	Simon Pilgrim	2017-07-06	1	-0/+685