summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/avx512dq-intrinsics.ll
Commit message (Expand)AuthorAgeFilesLines
* [X86] Make lowering of intrinsics with rounding mode stricter so that only va...Craig Topper2019-03-101-12/+12
* [X86] Remove GCCBuiltins from 512-bit cvt(u)qqtops, cvt(u)qqtopd, and cvt(u)d...Craig Topper2019-01-261-16/+24
* [X86] In getScalarMaskingNode, replace scalar_to_vector with a bitcast to v8i...Craig Topper2018-11-211-8/+8
* [X86] Add intrinsics for KTEST instructions.Craig Topper2018-08-311-0/+68
* [X86] Add intrinsics for KADD instructionsCraig Topper2018-08-281-0/+44
* [X86] Merge the FR128 and VR128 regclass since they have identical spill and ...Craig Topper2018-07-161-4/+4
* [X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics tha...Craig Topper2018-06-271-10/+10
* [X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and imp...Craig Topper2018-06-261-8/+12
* Revert r335562 and 335563 "[X86] Redefine avx512 packed fpclass intrinsics to...Craig Topper2018-06-261-12/+8
* [X86] Redefine avx512 packed fpclass intrinsics to return a vXi1 mask and imp...Craig Topper2018-06-261-8/+12
* [X86] Update fpclass intrinsic tests to chain their calls to the intrinsic ra...Craig Topper2018-06-251-108/+46
* [X86][AVX512] Cleanup intrinsics testsSimon Pilgrim2018-06-031-208/+532
* Followup on Proposal to move MIR physical register namespace to '$' sigil.Puyan Lotfi2018-01-311-6/+6
* [X86] Remove llvm.x86.avx512.cvt*2mask.* intrinsics and autoupgrade to (icmp ...Craig Topper2018-01-091-26/+0
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-8/+8
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-29/+29
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-8/+8
* [X86] Use sse_load_f32/f64 to improve load folding for scalar VFPCLASS intrin...Craig Topper2017-11-131-4/+2
* [X86] Add tests for missed opportunities to fold a 128-bit vector load into v...Craig Topper2017-11-131-0/+26
* [X86] Add an X86ISD::RANGES opcode to use for the scalar intrinsics.Craig Topper2017-11-121-20/+10
* [X86] Add test cases and command lines demonstrating how we accidentally sele...Craig Topper2017-11-121-19/+48
* [X86] Finishing broadcastf32x2 and broadcasti32x2 intrinsics lowering to IR. ...Uriel Korach2017-09-261-40/+0
* [AVX512] Remove and autoupgrade many of the broadcast intrinsicsCraig Topper2017-08-111-140/+0
* Add LiveRangeShrink pass to shrink live range within BB.Dehao Chen2017-05-311-2/+2
* [X86][AVX512] Make i1 illegal in the CodeGenGuy Blank2017-05-191-10/+0
* Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB."Hans Wennborg2017-05-181-2/+2
* Add LiveRangeShrink pass to shrink live range within BB.Dehao Chen2017-05-121-2/+2
* [X86][LLVM] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into g...Michael Zuckerman2017-04-041-24/+0
* [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registersCraig Topper2017-03-281-25/+28
* [AVX-512] Add additional test cases for broadcast intrinsics that demonstates...Craig Topper2017-01-191-0/+52
* [AVX-512] Remove vinsert intrinsics and autoupgrade to native shufflevectors....Craig Topper2017-01-031-80/+0
* [AVX-512] Remove vextract intrinsics and autoupgrade to native shufflevectors...Craig Topper2017-01-031-41/+0
* [X86][AVX512] Add mask/maskz writemask support to subvector broadcast shuffle...Simon Pilgrim2016-10-211-4/+4
* [AVX-512] Add shuffle comments for vbroadcast instructions.Craig Topper2016-10-151-6/+6
* [X86,AVX-512] Use INSERT_SUBREG instead of SUBREG_TO_REG when the input is no...Craig Topper2016-09-191-2/+2
* Revert r274613 because it breaks the test suite with AVX512Michael Kuperstein2016-08-251-2/+6
* Revert r279782 due to debug buildbot breakage.Michael Kuperstein2016-08-251-6/+2
* Revert r274613 because it breaks the test suite with AVX512Michael Kuperstein2016-08-251-2/+6
* [AVX512] Fix VFPCLASSSD/VFPCLASSSS intrinsic lowering. The i1 result should b...Igor Breger2016-08-141-24/+4
* AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 intege...Elena Demikhovsky2016-08-071-3/+0
* VirtRegMap: Replace some identity copies with KILL instructions.Matthias Braun2016-07-091-0/+10
* Re-commit of 274613.Elena Demikhovsky2016-07-061-4/+0
* Reverted 274613 due to compilation failue. Elena Demikhovsky2016-07-061-0/+4
* AVX-512: Optimization for patterns with i1 scalar typeElena Demikhovsky2016-07-061-4/+0
* [X86][AVX512] Add support for VPERM/VSHUF masked shuffle commentsSimon Pilgrim2016-07-031-8/+8
* [AVX512] Add patterns for any-extending a mask that use the def of KMOVW/KMOV...Craig Topper2016-06-211-2/+2
* [AVX512] Use update_llc_test_checks.py to regenerate a test in preparation fo...Craig Topper2016-06-211-111/+160
* [X86][AVX512] Lower broadcast sub vector to vector inrtrinsicsAsaf Badouh2015-12-281-0/+76
* AVX512: Change VPMOVB2M DAG lowering , use CVT2MASK node instead TRUNCATE.Igor Breger2015-12-271-1/+24
* AVX512: VPMOVM2B/W/D/Q intrinsic implementation.Igor Breger2015-12-241-35/+60
OpenPOWER on IntegriCloud