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path: root/llvm/test/CodeGen/X86/2012-1-10-buildvector.ll
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* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-2/+2
* [X86] Add a target-specific DAG combine to combine extract_subvector from all...Craig Topper2017-08-271-1/+0
* [X86] SET0 to use XMM registers where possible PR26018 PR32862Dinar Temirbulatov2017-07-271-1/+1
* [X86][SSE] Fix domains for VZEXT_LOAD type instructionsSimon Pilgrim2016-12-151-2/+2
* [X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to integer...Simon Pilgrim2016-12-071-1/+1
* [X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when only...Craig Topper2016-05-081-1/+1
* Make utils/update_llc_test_checks.py note that the assertions areJames Y Knight2015-11-231-0/+1
* use update_llc_test_checks.py to tighten checkingSanjay Patel2015-04-031-14/+14
* [X86, AVX] fix zero-extending integer operand load patterns to use integer in...Sanjay Patel2015-03-311-1/+1
* [X86, AVX] try to lowerVectorShuffleAsElementInsertion() for all 256-bit vect...Sanjay Patel2015-03-311-6/+7
* [X86] Use vmovss to handle inserting an element into index 0 of a v8f32 vecto...Craig Topper2015-03-051-1/+2
* Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-181-2/+2
* Fix a bug in the lowering of BUILD_VECTOR for AVX. SCALAR_TO_VECTOR does not ...Nadav Rotem2012-01-111-2/+15
* Fix a bug in the legalization of shuffle vectors. When we emulate shuffles us...Nadav Rotem2012-01-101-0/+13
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