| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [ARM] Ignore Implicit CPSR regs when lowering from Machine to MC operands | David Green | 2019-09-03 | 1 | -4/+4 |
| * | [ARM] Generate 8.1-m CSINC, CSNEG and CSINV instructions. | David Green | 2019-09-03 | 1 | -10/+6 |
| * | [ARM] MVE trunc to i1 vectors | David Green | 2019-08-15 | 1 | -0/+61 |
| * | [ARM] Better patterns for fp <> predicate vectors | David Green | 2019-07-28 | 1 | -64/+67 |
| * | [ARM] Disable MVE fptosi and friends | David Green | 2019-07-24 | 1 | -50/+161 |
| * | [ARM] MVE predicate register support | David Green | 2019-07-24 | 1 | -0/+164 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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