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path: root/llvm/test/CodeGen/Thumb2/LowOverheadLoops
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* [ARM][LowOverheadLoops] Allow all MVE instrs.Sam Parker2020-01-142-0/+494
* [ARM][LowOverheadLoops] Change predicate inspectionSam Parker2020-01-141-0/+230
* [ARM][MVE] Disallow VPSEL for tail predicationSam Parker2020-01-145-0/+1183
* [ARM][MVE] MVE-I should not be disabled by -mfpu=noneMomchil Velikov2020-01-095-5/+5
* Revert "[ARM][LowOverheadLoops] Update liveness info"Sam Parker2020-01-0913-103/+108
* [ARM][LowOverheadLoops] Update liveness infoSam Parker2020-01-0913-108/+103
* [NFC][ARM] Update testsSam Parker2020-01-086-142/+283
* [DAGCombine][X86][Thumb2/LowOverheadLoops] `A - (A & C)` -> `A & (~C)` fold (...Roman Lebedev2020-01-033-33/+23
* [ARM][NFC] Update MIR testSam Parker2020-01-031-23/+40
* [ARM] Add +mve feature to mve tests. NFCDavid Green2020-01-013-3/+3
* [ARM] Sink splat to ICmpDavid Green2019-12-302-146/+151
* [ARM][MVE] Fixes for tail predication.Sam Parker2019-12-204-0/+540
* [ARM][MVE] Tail predicate in the presence of vcmpSam Parker2019-12-204-82/+981
* [ARM][LowOverheadLoops] Remove dead loop update instructions.Sjoerd Meijer2019-12-116-6/+516
* [ARM] Enable MVE masked loads and storesDavid Green2019-12-094-4/+4
* [MBP] Avoid tail duplication if it can't bring benefitGuozhi Wei2019-12-061-3/+3
* [ARM,MVE] Rename and clean up VCTP IR intrinsics.Simon Tatham2019-12-025-63/+15
* [ARM][MVE][Intrinsics] Add MVE VMUL intrinsics. Remove annoying "t1" from VMU...Mark Murray2019-11-271-6/+6
* [Codegen][ARM] Add addressing modes from masked loads and storesDavid Green2019-11-264-80/+49
* [ARM][ReachingDefs] Remove dead code in loloops.Sam Parker2019-11-264-124/+30
* [ARM][ReachingDefs] RDA in LoLoopsSam Parker2019-11-262-0/+305
* [ARM][ConstantIslands] Correct block size updateSam Parker2019-11-261-0/+451
* [ARM][MVE] Enable narrow vectors for tail predSam Parker2019-11-193-266/+837
* [ARM][MVE] Tail predication conversionSam Parker2019-11-193-52/+163
* [ARM] Use isFMAFasterThanFMulAndFAdd for MVEDavid Green2019-11-041-7/+6
* [ARM][MVE] Change VPST to use, not def, VPRSam Parker2019-10-173-65/+153
* [DAGCombine][ARM] Enable extending masked loadsSam Parker2019-10-171-618/+202
* [NFC][ARM][MVE] More testsSam Parker2019-10-011-0/+602
* [NFC][ARM][MVE] More testsSam Parker2019-09-301-0/+2014
* [ARM][MVE] Change VCTP operandSam Parker2019-09-308-46/+63
* [NFC][ARM] Add some tail-predication testsSam Parker2019-09-271-0/+1757
* [ARM][MVE] Remove old tail predicatesSam Parker2019-09-233-0/+609
* [ARM][LowOverheadLoops] Use subs during revert.Sam Parker2019-09-234-11/+10
* [ARM][LowOverheadLoops] Use tBcc when revertingSam Parker2019-09-234-5/+5
* [ARM] Fix for buildbotsSam Parker2019-09-191-26/+24
* [ARM] Fix for buildbotsSam Parker2019-09-174-51/+97
* [ARM][LowOverheadLoops] Add LR def safety checkSam Parker2019-09-1714-261/+599
* [ARM] LE support in ConstantIslandsSam Parker2019-09-174-0/+744
* [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir...Guillaume Chatelet2019-09-1115-15/+15
* [ARM] MVE Tail PredicationSam Parker2019-09-067-0/+1505
* [ARM][LowOverheadLoops] Fix generated code for "revert".Eli Friedman2019-08-153-4/+4
* [ARM][LowOverheadLoops] Revert after read/writeSam Parker2019-08-072-0/+256
* [ARM][LowOverheadLoops] Revert non-header LE targetSam Parker2019-07-301-0/+255
* [ARM][LowOverheadLoops] Add CPSR defsSam Parker2019-07-2612-496/+417
* [ARM][LowOverheadLoops] Fix branch target codegenSam Parker2019-07-231-0/+513
* [ARM][LowOverheadLoops] Revert remaining pseudosSam Parker2019-07-221-0/+170
* [ARM][LowOverheadLoops] Correct offset checkingSam Parker2019-07-113-2/+425
* [ARM] WLS/LE Code GenerationSam Parker2019-07-0110-0/+1507
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