| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [Sparc] Use synthetic instruction clr to zero register instead of sethi | Daniel Cederman | 2018-04-20 | 1 | -1/+1 |
| * | [Sparc] Fix addressing mode when using 64-bit values in inline assembly | Daniel Cederman | 2018-04-20 | 1 | -0/+8 |
| * | [SPARC] Support 'f' and 'e' inline asm constraints. | James Y Knight | 2017-05-12 | 1 | -0/+18 |
| * | [Sparc] Enable more inline assembly constraints. | Chris Dewhurst | 2016-05-20 | 1 | -0/+12 |
| * | [Sparc] Implement i64 load/store support for 32-bit sparc. | James Y Knight | 2015-08-10 | 1 | -7/+46 |
| * | Use the integrated assembler by default on SPARC. | Brad Smith | 2015-01-14 | 1 | -1/+1 |
| * | [Sparc] Add support for inline assembly constraints which specify registers b... | Venkatraman Govindaraju | 2014-01-22 | 1 | -0/+10 |
| * | [Sparc] Add support for inline assembly constraint 'I'. | Venkatraman Govindaraju | 2014-01-22 | 1 | -0/+35 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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