summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
Commit message (Expand)AuthorAgeFilesLines
* [RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/R...Alex Bradbury2019-05-231-30/+30
* [RISCV] Introduce codegen patterns for instructions introduced in RV64IAlex Bradbury2018-11-301-3/+156
* [RISCV] Implement frame pointer eliminationAlex Bradbury2018-01-181-210/+0
* [RISCV] Enable emission of alias instructions by defaultAlex Bradbury2017-12-151-39/+39
* [RISCV] Implement prolog and epilog insertionAlex Bradbury2017-12-111-0/+210
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-30/+30
* [RISCV] Use register X0 (ZERO) for constant 0Alex Bradbury2017-11-211-15/+4
* [RISCV] Support and tests for a variety of additional LLVM IR constructsAlex Bradbury2017-11-211-0/+296
OpenPOWER on IntegriCloud