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path: root/llvm/test/CodeGen/RISCV/remat.ll
Commit message (Expand)AuthorAgeFilesLines
* [RISCV][NFC] Fix use of missing attribute groups in testsLuís Marques2019-12-231-4/+4
* [MBP] Avoid tail duplication if it can't bring benefitGuozhi Wei2019-12-061-13/+12
* [RISCV] Switch to the Machine SchedulerLuis Marques2019-09-171-27/+27
* Revert Patch from PhabricatorLuis Marques2019-09-171-27/+27
* Patch from PhabricatorLuis Marques2019-09-171-27/+27
* Revert [MBP] Disable aggressive loop rotate in plain modeJordan Rupprecht2019-08-291-26/+29
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-221-29/+26
* Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"Hans Wennborg2019-08-121-26/+29
* [MBP] Disable aggressive loop rotate in plain modeGuozhi Wei2019-08-081-29/+26
* [RISCV] Regenerate remat.ll and atomic-rmw.ll after D43256Fangrui Song2019-06-151-26/+29
* [RISCV] Only mark fp as reserved if the function has a dedicated frame pointerAlex Bradbury2019-03-131-47/+49
* Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUIAna Pazos2019-01-251-40/+39
* [RISCV] Set CostPerUse for registersSameer AbuAsal2018-05-231-9/+9
* [RISCV] Set isReMaterializable on ADDI and LUI instructionsAlex Bradbury2018-05-171-38/+29
* [RISCV] Add remat.ll test caseAlex Bradbury2018-04-271-0/+209
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