| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [RISCV] Codegen support for RV32F floating point comparison operations | Alex Bradbury | 2018-03-21 | 1 | -0/+14 |
| * | [RISCV] Implement frame pointer elimination | Alex Bradbury | 2018-01-18 | 1 | -7/+0 |
| * | [RISCV] Enable emission of alias instructions by default | Alex Bradbury | 2017-12-15 | 1 | -4/+4 |
| * | [RISCV] Implement prolog and epilog insertion | Alex Bradbury | 2017-12-11 | 1 | -0/+7 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -2/+2 |
| * | [RISCV] Use register X0 (ZERO) for constant 0 | Alex Bradbury | 2017-11-21 | 1 | -2/+1 |
| * | [RISCV] Implement lowering of ISD::SELECT | Alex Bradbury | 2017-11-21 | 1 | -0/+18 |

