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path: root/llvm/test/CodeGen/RISCV/bare-select.ll
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Switch to the Machine SchedulerLuis Marques2019-09-171-8/+8
* Revert Patch from PhabricatorLuis Marques2019-09-171-8/+8
* Patch from PhabricatorLuis Marques2019-09-171-8/+8
* [RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/R...Alex Bradbury2019-05-231-2/+2
* [RISCV] Codegen support for RV32F floating point comparison operationsAlex Bradbury2018-03-211-0/+14
* [RISCV] Implement frame pointer eliminationAlex Bradbury2018-01-181-7/+0
* [RISCV] Enable emission of alias instructions by defaultAlex Bradbury2017-12-151-4/+4
* [RISCV] Implement prolog and epilog insertionAlex Bradbury2017-12-111-0/+7
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-041-2/+2
* [RISCV] Use register X0 (ZERO) for constant 0Alex Bradbury2017-11-211-2/+1
* [RISCV] Implement lowering of ISD::SELECTAlex Bradbury2017-11-211-0/+18
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